MAX1444
10-Bit, 40Msps, 3.0V, Low-Power
ADC with Internal Reference
______________________________________________________________________________________ 13
60
65
80
75
70
85
90
20 4030 50 60 70
CLOCK DUTY CYCLE (%)
SFDR (dBc)
f
IN
= 13.24MHz AT-0.5dB FS
Figure 3a. Spurious-Free Dynamic Range vs. Clock Duty Cycle
(Differential Input)
56
57
59
58
60
61
20 4030 50 60 70
CLOCK DUTY CYCLE (%)
SNR (dB)
f
IN
= 13.24MHz AT-0.5dB FS
Figure 3b. Signal-to-Noise Ratio vs. Clock Duty Cycle
(Differential Input)
-80
-76
-68
-72
-64
-60
20 4030 50 60 70
CLOCK DUTY CYCLE (%)
THD (dBc)
f
IN
= 13.24MHz AT-0.5dB FS
Figure 4a. Total Harmonic Distortion vs. Clock Duty Cycle
(Differential Input)
61
60
59
58
57
20 4030 50 60 70
CLOCK DUTY CYCLE (%)
SINAD (dB)
f
IN
= 13.24MHz AT-0.5dB FS
Figure 4b. Signal-to-Noise Plus Distortion vs. Clock Duty Cycle
(Differential Input)
OUTPUT
DATA D9–D0
OE
t
DISABLE
t
ENABLE
HIGH-ZHIGH-Z
VALID DATA
Figure 5. Output Enable Timing
MAX1444
10-Bit, 40Msps, 3.0V, Low-Power
ADC with Internal Reference
14 ______________________________________________________________________________________
N - 6
N
N - 5
N + 1
N - 4
N + 2
N - 3
N + 3
N - 2
N + 4
N - 1
N + 5
N
N + 6
N + 1
N + 7
5.5 CLOCK-CYCLE LATENCY
ANALOG INPUT
CLOCK INPUT
DATA OUTPUT
t
DO
t
AD
t
CL
t
CH
Figure 6. System and Output Timing Diagram
System Timing Requirements
Figure 6 shows the relationship between the clock
input, analog input, and data output. The MAX1444
samples at the falling edge of the input clock. Output
data is valid on the rising edge of the input clock. The
output data has an internal latency of 5.5 clock cycles.
Figure 5 shows the relationship between the input clock
parameters and the valid output data.
__________Applications Information
Figure 7 shows a typical application circuit containing a
single-ended to differential converter. The internal refer-
ence provides a V
DD
/2 output voltage for level shifting
purposes. The input is buffered and then split to a volt-
age follower and inverter. A lowpass filter follows the op
amps to suppress some of the wideband noise associ-
ated with high-speed op amps. The user may select the
R
ISO
and C
IN
values to optimize the filter performance
to suit a particular application. For the application in
Figure 7, an R
ISO
of 50Ω is placed before the capaci-
tive load to prevent ringing and oscillation. The 22pF
C
IN
capacitor acts as a small bypassing capacitor.
Using Transformer Coupling
An RF transformer (Figure 8) provides an excellent
solution for converting a single-ended source signal to
a fully differential signal, required by the MAX1444 for
optimum performance. Connecting the transformer’s
center tap to COM provides a V
DD
/2 DC level shift to
the input. Although a 1:1 transformer is shown, a step-
up transformer may be selected to reduce the drive
requirements. A reduced signal swing from the input
driver, such as an op amp, may also improve the over-
all distortion.
In general, the MAX1444 provides better SFDR and
THD with fully differential input signals than single-
ended drive, especially for very high input frequencies.
In differential input mode, even-order harmonics are
lower since both inputs (IN+, IN-) are balanced, and
each of the inputs only requires half the signal swing
compared to single-ended mode.
Single-Ended AC-Coupled Input Signal
Figure 9 shows an AC-coupled, single-ended applica-
tion. The MAX4108 op amp provides high speed, high
bandwidth, low noise, and low distortion to maintain the
integrity of the input signal.
MAX1444
10-Bit, 40Msps, 3.0V, Low-Power
ADC with Internal Reference
______________________________________________________________________________________ 15
MAX1444
T1
N.C.
V
IN
4
3
2
5
61
10pF
10pF
0.1μF
0.1μF
2.2μF
25Ω
25Ω
MINI-CIRCUITS
ADT1–1WT
IN-
IN+
COM
Figure 8. Using a Transformer for AC Coupling
MAX1444
0.1
μ
F
1k
Ω
1k
Ω
100
Ω
100Ω
C
IN
COM
C
IN
IN+
IN-
0.1
μ
F
R
ISO
R
ISO
REFP
REFN
R
ISO
= 50Ω
C
IN
= 22pF
V
IN
MAX4108
Figure 9. Single-Ended AC-Coupled Input
INPUT
300Ω
-5V
5V
0.1μF
0.1μF
0.1μF
C
IN
22pF
C
IN
22pF
R
ISO
50Ω
R
ISO
50Ω
-5V
600Ω
300Ω
300Ω
IN+
IN-
LOWPASS FILTER
COM
600Ω
5V
-5V
0.1μF
600Ω
300Ω
600Ω
300Ω
0.1μF
0.1μF
0.1μF
5V
0.1μF
300Ω
MAX4108
MAX1444
MAX4108
MAX4108
LOWPASS FILTER
Figure 7. Typical Application Circuit for Single-Ended to Differential Conversion

MAX1444EHJ+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 10-Bit 40Msps 3V High Speed ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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