MAX1444
10-Bit, 40Msps, 3.0V, Low-Power
ADC with Internal Reference
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PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Hysteresis V
HYST
0.1 V
I
IH
V
IH
= V
DD
= OV
DD
±5
Input Leakage
I
IL
V
IL
= 0V ±5
µA
Input Capacitance C
IN
5pF
DIGITAL OUTPUTS (D9–D0)
Output Voltage Low V
OL
I
SINK
= 200μA 0.2 V
Output Voltage High V
OH
I
SOURCE
= 200μA
OV
DD
-
0.2
V
Three-State Leakage Current I
LEAK
OE = OV
DD
±10 µA
Three-State Output Capacitance C
OUT
OE = OV
DD
5pF
POWER REQUIREMENTS
Analog Supply Voltage V
DD
2.7 3.0 3.6 V
Output Supply Voltage OV
DD
1.7 3.0 3.6 V
O p er ati ng , f
I N
= 19.91M H z at - 0.5d BFS 19 27 mA
Analog Supply Current I
VDD
S hutd ow n, cl ock i d l e, P D = O E = OV
D D
415µA
O p er ati ng , f
I N
= 19.91M H z at - 0.5d BFS 4.5 mA
Output Supply Current I
OVDD
S hutd ow n, cl ock i d l e, P D = O E = OV
D D
120µA
Offset ±0.1 mV/V
Power-Supply Rejection PSRR
Gain ±0.1 %/V
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid t
DO
Figure 6 (Note 3) 5 8 ns
OE Fall to Output Enable t
ENABLE
Figure 5 10 ns
OE Rise to Output Disable t
DISABLE
Figure 5 15 ns
CLK Pulse Width High t
CH
Figure 6, clock period 25ns 12.5 ±3.8 ns
CLK Pulse Width Low t
CL
Figure 6, clock period 25ns 12.5 ±3.8 ns
Wake-up Time t
WAKE
(Note 4) 1.7 µs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V; OV
DD
= 2.7V; 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V; REFOUT connected to
REFIN through a 10kΩ resistor; V
IN
= 2V
P-P
(differential with respect to COM); C
L
= 10pF at digital outputs; f
CLK
= 40MHz; T
A
= T
MIN
to T
MAX
, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typi-
cal values are at T
A
= +25°C.)
Note 1: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a 1.024V full-scale
input voltage range.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better if referenced to the two-tone envelope.
Note 3: Digital outputs settle to V
IH
, V
IL
.
Note 4: REFIN is driven externally. REFP, COM, and REFN are left open while powered down.
