AD7476/AD7477/AD7478
Rev. F | Page 10 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
01024-003
1
V
DD
6
CS
2
GND
5
SDATA
3
V
IN
4
SCLK
AD7476/
AD7477/
AD7478
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Power Supply Input. The V
DD
range for the AD7476/AD7477/AD7478 is from 2.35 V to 5.25 V.
2 GND
Analog Ground. Ground reference point for all circuitry on the part. All analog input signals should be referred to this
GND voltage.
3 V
IN
Analog Input. Single-ended analog input channel. The input range is 0 V to V
DD
.
4 SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as
the clock source for the AD7476/AD7477/AD7478 conversion process.
5 SDATA
Data Out. Logic output. The conversion result is provided on this output as a serial data stream. The bits are clocked
out on the falling edge of the SCLK input. The data stream from the AD7476 consists of four leading zeros followed by
the 12 bits of conversion data; this is provided MSB first. The data stream from the AD7477 consists of four leading
zeros followed by the 10 bits of conversion data, followed by two trailing zeros, which is also provided MSB first. The
data stream from the AD7478 consists of four leading zeros followed by the eight bits of conversion data, followed by
four trailing zeros, which is provided MSB first.
6
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7476/AD7477/AD7478 and framing the serial data transfer.
AD7476/AD7477/AD7478
Rev. F | Page 11 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0 50045040035030025020015010050
SNR (dB)
FREQUENCY (kHz)
01024-007
8192 POINT FFT
f
SAMPLE
= 1MSPS
f
IN
= 100kHz
SINAD = 49.82dB
THD = –75.22dB
SFDR = –67.78dB
–15
–35
–55
–75
–95
–115
0 50045040035030025020015010050
SNR (dB)
FREQUENCY (kHz)
01024-004
8192 POINT FFT
f
SAMPLE
= 1MSPS
f
IN
= 100kHz
SINAD = 71.67dB
THD = –81.00dB
SFDR = –81.63dB
Figure 4. AD7476 Dynamic Performance at 1 MSPS
Figure 7. AD7478 Dynamic Performance at 1 MSPS
66
–73
–72
–71
–70
–69
–68
–67
10k 1M100k
SINAD (dB)
INPUT FREQUENCY (kHz)
01024-008
V
DD
= 2.35V
SCLK = 20MHz
V
DD
= 2.7V
V
DD
= 5.25V
V
DD
= 3.6V
V
DD
= 4.75V
–15
–35
–55
–75
–95
–115
0 30025020015010050
SNR (dB)
FREQUENCY (kHz)
01024-005
8192 POINT FFT
f
SAMPLE
= 600kSPS
f
IN
= 100kHz
SINAD = 71.71dB
THD = –80.88dB
SFDR = –83.23dB
Figure 5. AD7476 Dynamic Performance at 600 kSPS
Figure 8. AD7476 SINAD vs. Input Frequency at 993 kSPS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0 50045040035030025020015010050
SNR (dB)
FREQUENCY (kHz)
01024-006
8192 POINT FFT
f
SAMPLE
= 1MSPS
f
IN
= 100kHz
SINAD = 61.66dB
THD = –80.64dB
SFDR = –85.75dB
69.0
–72.5
–72.0
–71.5
–71.0
–70.5
–70.0
–69.5
10k 1M100k
SINAD (dB)
INPUT FREQUENCY (kHz)
01024-009
SCLK = 12MHz
V
DD
= 2.35V
V
DD
= 2.7V
V
DD
= 5.25V
V
DD
= 4.75V
V
DD
= 3.6V
Figure 6. AD7477 Dynamic Performance at 1 MSPS
Figure 9. AD7476 SINAD vs. Input Frequency at 605 kSPS
AD7476/AD7477/AD7478
Rev. F | Page 12 of 24
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. For the
AD7476/AD7477, the endpoints of the transfer function are
zero scale, a point ½ LSB below the first code transition, and
full scale, a point ½ LSB above the last code transition. For the
AD7478, the endpoints of the transfer function are zero scale, a
point 1 LSB below the first code transition, and full scale, a
point 1 LSB above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal (such as AGND + 0.5 LSB). For the
AD7478, this is the deviation of the first code transition
(00 . . . 000) to (00 . . . 001) from the ideal (such as
AGND + 1 LSB).
Gain Error
For the AD7476/AD7477, this is the deviation of the last code
transition (111 . . . 110) to (111 . . . 111) from the ideal (such as
V
REF
– 1.5 LSB) after the offset error has been adjusted out. For
the AD7478, this is the deviation of the last code transition
(111 . . . 110) to (111 . . . 111) from the ideal (such as V
REF
– 1
LSB) after the offset error has been adjusted.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode after the
end of conversion. Track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±0.5 LSB, after the end of conversion. See
the Serial Interface section for more details.
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal-to-(noise + distortion) at
the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (f
S
/2), excluding dc.
The ratio is dependent on the number of quantization levels in
the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal-to-(noise +
distortion) ratio for an ideal N-bit converter with a sine wave
input is given by
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Thus, for a 12-bit converter, this is 74 dB; for a 10-bit converter
it is 62 dB; and for an 8-bit converter it is 50 dB.
Total Una djusted Er ror
This is a comprehensive specification that includes gain error,
linearity error, and offset error.
Total Harmonic Distortion (THD)
Total harmonic distortion is the ratio of the rms sum of
harmonics to the fundamental. For the AD7476/
AD7477/AD7478, it is defined as:
()
1
2
6
2
5
2
4
2
3
2
2
log20dB
V
VVVVV
THD
++++
=
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
, and V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, it is
a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities creates distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, and so on. Intermodulation distortion terms
are those for which neither m nor n is equal to zero. For
example, the second-order terms include (fa + fb) and (fa − fb),
while the third-order terms include (2fa + fb), (2fa − fb),
(fa + 2fb), and (fa − 2fb).
The AD7476/AD7477/AD7478 are tested using the CCIF
standard where two input frequencies are used (fa = 498.7 kHz
and fb = 508.7 kHz). In this case, the second-order terms are
usually distanced in frequency from the original sine waves
while the third-order terms are usually at a frequency close to
the input frequencies. As a result, the second- and third-order
terms are specified separately. The calculation of the
intermodulation distortion is as per the THD specification
where it is the ratio of the rms sum of the individual distortion
products to the rms amplitude of the sum of the fundamentals,
expressed in dB.

AD7477ARTZ-500RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 10Bit 1MSPS Lo-Pwr
Lifecycle:
New from this manufacturer.
Delivery:
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