AD7476/AD7477/AD7478
Rev. F | Page 14 of 24
TYPICAL CONNECTION DIAGRAM
Figure 14 shows a typical connection diagram for the
AD7476/AD7477/AD7478. V
REF
is taken internally from V
DD
and as such, V
DD
should be well decoupled. This provides an
analog input range of 0 V to V
DD
. The conversion result is
output in a 16-bit word with four leading zeros followed by the
MSB of the 12-bit, 10-bit, or 8-bit result. The 10-bit result from
the AD7477 is followed by two trailing zeros. The 8-bit result
from the AD7478 is followed by four trailing zeros.
Alternatively, because the supply current required by the
AD7476/AD7477/AD7478 is so low, a precision reference can
be used as the supply source to the part. A REF19x voltage
reference (REF195 for 5 V or REF193 for 3 V) can be used to
supply the required voltage to the ADC (see Figure 14). This
configuration is especially useful if the power supply is quite
noisy or if the system supply voltages are at some value other
than 5 V or 3 V, such as 15 V.
The REF19x outputs a steady voltage to the AD7476/
AD7477/AD7478. If the low dropout REF193 is used, the
current it typically needs to supply to the AD7476/AD7477/
AD7478 is 1 mA. When the ADC is converting at a rate of
1 MSPS, the REF193 needs to supply a maximum of 1.6 mA to
the AD7476/AD7477/AD7478. The load regulation of the
REF193 is typically 10 ppm/mA (REF193, V
S
= 5 V), which
results in an error of 16 ppm (48 µV) for the 1.6 mA drawn
from it. This corresponds to a 0.065 LSB error for the AD7476
with V
DD
= 3 V from the REF193, a 0.016 LSB error for the
AD7477, and a 0.004 LSB error for the AD7478.
For applications where power consumption is of concern, the
power-down mode of the ADC and the sleep mode of the
REF19x reference should be used to improve power perform-
ance. See the Modes of Operation section.
01024-014
V
IN
0V TO V
DD
INPUT
GND
V
DD
AD7476/
AD7477/
AD7478
SDATA
SCLK
CS
µC/µP
SERIAL
INTERFACE
1µF
TANT
0.1µF
690nF
1mA
3V
10µF 10µF
REF193
5V
SUPPLY
Figure 14. REF193 as Power Supply
Table 7 provides some typical performance data with various
references used as a V
DD
source with a low frequency analog
input. Under the same setup conditions, the references are
compared and the AD780 proved the optimum reference.
Table 7.
Reference Tied to V
DD
AD7476 SNR Performance
1 kHz Input (dB)
AD780 @ 3 V 71.17
REF193 70.4
AD780 @ 2.5 V 71.35
REF192 70.93
AD1582 70.05
Analog Input
Figure 15 shows an equivalent circuit of the analog input
structure of the AD7476/AD7477/AD7478. The two diodes, D1
and D2, provide ESD protection for the analog input. Take care
to ensure that the analog input signal never exceeds the supply
rails by more than 300 mV. This causes these diodes to become
forward-biased and start conducting current into the substrate.
These diodes can conduct a maximum of 10 mA without
causing irreversible damage to the part.
The Capacitor C1 in Figure 15 is typically about 4 pF and can
primarily be attributed to pin capacitance. The Resistor R1 is a
lumped component made up of the on resistance of a switch.
This resistor is typically about 100 . The Capacitor C2 is the
ADC sampling capacitor and typically has a capacitance of
30 pF. For ac applications, removing high frequency compo-
nents from the analog input signal is recommended by use of a
band-pass filter on the relevant analog input pin. In applications
where harmonic distortion and signal-to-noise ratio are critical,
the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac
performance of the ADC. This may necessitate using an input
buffer amplifier. The choice of the op amp is a function of the
particular application.
01024-015
V
IN
D2
CONVERSAION PHASE—SWITCH OPEN
TRACK PHASE—SWITCH CLOSED
D1
C1
4pF
V
DD
R1
C2
30pF
Figure 15. Equivalent Analog Input Circuit
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases and performance degrades.
Figure 16 shows a graph of the total harmonic distortion versus
source impedance for different analog input frequencies when
using a supply voltage of 2.7 V and sampling at a rate of
605 kSPS. Figure 17 and Figure 18 each show a graph of the
total harmonic distortion vs. analog input signal frequency for
various supply voltages while sampling at 993 kSPS with an
SCLK frequency of 20 MHz and 605 kSPS with an SCLK
frequency of 12 MHz, respectively.
