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22
Reference voltage (VREF17) Characteristics at Ta = 40C to +85C, V
SS
1 = V
SS
2 = 0V
Parameter Symbol Pin/Remarks Conditions
Specification
V
DD
[V] min typ max unit
Output voltage VOVREF
2.0 to 5.5 1.67 1.75 1.83 V
Reference voltage operation
current (Note 7-1)
IDDVREF
2.0 to 5.5 110 A
Operation stabilization time
(Note 7-2)
tVRW
2.0 to 5.5 100 s
Note 7-1: IDDVREF denotes the currents that only flow to multivariable RC oscillator circuit’s reference voltage circuit.
Note 7-2: tVRW denotes the stabilization time from starting multivariable RC oscillator.
Power-on Reset (POR) Characteristics
at Ta = 40C to +85C, V
SS
1 = V
SS
2 = 0V
Parameter Symbol Pin/Remarks Conditions
Specification
Option selected
voltage
min typ max unit
POR release
voltage
PORRL Select from option.
(Note 8-1)
1.67V
1.55 1.66 1.77
V
1.97V
1.85 1.96 2.07
2.07V
1.93 2.05 2.17
2.37V
2.23 2.35 2.47
2.57V
2.43 2.55 2.67
2.87V
2.71 2.85 2.99
3.86V
3.65 3.83 4.00
4.35V
4.12 4.32 4.50
Detection voltage
unknown state
POUKS See Fig. 7.
(Note 8-2)
0.7 0.95
Power supply rise
time
PORIS Power supply rise
time from 0V to 1.6V.
100 ms
Note8-1: The POR release level can be selected out of 8 levels only when the LVD reset function is disabled.
Note8-2: POR is in an unknown state before transistors start operation.
Low Voltage Detection Reset (LVD) Characteristics
at Ta = 40C to +85C, V
SS
1 = V
SS
2 = 0V
Parameter Symbol Pin/Remarks Conditions
Specification
Option selected
voltage
min typ max unit
LVD reset voltage
(Note 9-2)
LVDET Select from option.
(Note 9-1)
(Note 9-3)
See Fig. 8.
1.91V
1.81 1.91 2.01
V
2.01V
1.90 2.00 2.10
2.31V
2.20 2.30 2.40
2.51V
2.40 2.50 2.60
2.81V
2.68 2.80 2.92
3.79V
3.62 3.78 3.94
4.28V
4.09 4.27 4.45
LVD hysteresis width LVHYS
1.91V
50
mV
2.01V
50
2.31V
50
2.51V
50
2.81V
50
3.79V
50
4.28V
50
Detection voltage
unknown state
LVUKS See Fig. 8.
(Note 9-4)
0.7 0.95 V
Low voltage detection
minimum width
(Reply sensitivity)
TLVDW LVDET-0.5V
See Fig. 9. 0.2 ms
Note9-1: The LVD reset level can be selected out of 7 levels only when the LVD reset function is enabled.
Note9-2: LVD reset voltage specification values do not include hysteresis voltage.
Note9-3: LVD reset voltage may exceed its specification values when port output state changes and/or when a large
current flows through port.
Note9-4: LVD is in an unknown state before transistors start operation.
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23
Consumption Current Characteristics at Ta = 40C to +85C, V
SS
1 = V
SS
2 = 0V
Parameter Symbol
Pin/
Remarks
Conditions
Specification
V
DD
[V] min typ max unit
Normal mode
consumption
current
(Note 10-1)
(Note 10-2)
IDDOP(1) V
DD
1 FmCF=12MHz ceramic oscillation mode
System clock set to 12MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
2.7 to 5.5 5.1 9.3
mA
2.7 to 3.6 3.1 5.6
IDDOP(2) CF1=24MHz external clock
System clock set to CF1 side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
3.0 to 5.5 5.2 10
3.0 to 3.6 3.3 6.2
IDDOP(3) FmCF=10MHz ceramic oscillation mode
System clock set to 10MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
2.2 to 5.5 4.4 8.4
2.2 to 3.6 2.8 5.5
IDDOP(4) FmCF=4MHz ceramic oscillation mode
System clock set to 4MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
1.8 to 5.5 2.3 5.3
1.8 to 3.6 1.6 3.0
IDDOP(5) CF oscillation low amplifier size selected.
(CFLAMP=1)
FmCF=4MHz ceramic oscillation mode
System clock set to 4MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/4 frequency division ratio
2.2 to 5.5 0.97 2.4
2.2 to 3.6 0.55 1.2
IDDOP(6) FsX’tal=32.768kHz crystal oscillation mode
Internal low speed RC oscillation stopped.
System clock set to internal medium speed
RC oscillation.
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
1.8 to 5.5 0.44 1.5
1.8 to 3.6 0.28 0.80
IDDOP(7) FsX’tal=32.768kHz crystal oscillation mode
Internal low speed and medium speed RC
oscillation stopped.
System clock set to 8MHz with
frequency variable RC oscillation
1/1 frequency division ratio
1.8 to 5.5 3.4 5.5
1.8 to 3.6 2.4 4.6
IDDOP(8)
External FsX’tal and FmCF oscillation stopped.
System clock set to internal low speed RC
oscillation.
Internal medium speed RC oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
1.8 to 5.5 51 163
A
1.8 to 3.6 38 103
IDDOP(9)
External FsX’tal and FmCF oscillation stopped.
System clock set to internal low speed RC
oscillation.
Internal medium speed RC oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
Ta=-10 to +50C
5.0 51 136
3.3 38 99
2.5 36 94
Note10-1: Values of the consumption current do not include current that flows into the output transistors and internal
pull-up resistors.
Note10-2: The consumption current values do not include operational current of LVD function if not specified.
Continued on next page.
LC87FBH08A
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24
Continued from preceding page.
Parameter Symbol
Pin/
Remarks
Conditions
Specification
V
DD
[V] min typ max unit
Normal mode
consumption
current
(Note 10-1)
(Note 10-2)
IDDOP(10) V
DD
1 FsX’tal=32.768kHz crystal oscillation mode
System clock set to 32.768kHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
1.8 to 5.5 34 97
A
1.8 to 3.6 14 44
IDDOP(11) FsX’tal=32.768kHz crystal oscillation mode
System clock set to 32.768kHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
Ta=-10 to +50C
5.0 34 88
3.3 14 36
2.5 9.1 22
HALT mode
consumption
current
(Note 10-1)
(Note 10-2)
IDDHALT(1) HALT mode
FmCF=12MHz ceramic oscillation mode
System clock set to 12MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
2.7 to 5.5 2.6 4.8
mA
2.7 to 3.6 1.4 2.4
IDDHALT(2) HALT mode
CF1=24MHz external clock
System clock set to CF1 side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
3.0 to 5.5 2.7 5.3
3.0 to 3.6 1.6 2.9
IDDHALT(3) HALT mode
FmCF=10MHz ceramic oscillation mode
System clock set to 10MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
2.2 to 5.5 2.2 4.3
2.2 to 3.6 1.2 2.2
IDDHALT(4) HALT mode
FmCF=4MHz ceramic oscillation mode
System clock set to 4MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/1 frequency division ratio
1.8 to 5.5 1.3 3.3
1.8 to 3.6 0.56 1.2
IDDHALT(5) HALT mode
CF oscillation low amplifier size selected.
(CFLAMP=1)
FmCF=4MHz ceramic oscillation mode
System clock set to 4MHz side
Internal low speed and medium speed RC
oscillation stopped.
Frequency variable RC oscillation stopped.
1/4 frequency division ratio
2.2 to 5.5 0.74 1.8
2.2 to 3.6 0.34 0.68
IDDHALT(6) HALT mode
FsX’tal=32.768kHz crystal oscillation mode
Internal low speed RC oscillation stopped.
System clock set to internal medium speed
RC oscillation
Frequency variable RC oscillation stopped.
1/2 frequency division ratio
1.8 to 5.5 0.32 0.90
1.8 to 3.6 0.21 0.44
Note10-1: Values of the consumption current do not include current that flows into the output transistors and internal
pull-up resistors.
Note10-2: The consumption current values do not include operational current of LVD function if not specified.
Continued on next page.

LC87FBH08AU-EB-NH

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
8-bit Microcontrollers - MCU 8-BIT MICROCONTROLLER
Lifecycle:
New from this manufacturer.
Delivery:
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