LC87FBH08A
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4
Oscillation Circuits
Internal oscillation circuits
Low-speed RC oscillation circuit (SRC): For system clock / For Watchdog timer (100kHz)
Medium-speed RC oscillation circuit (RC): For system clock (1MHz)
Frequency variable RC oscillation circuit (MRC): For system clock (8MHz 1.5%, Ta=10C to +85C)
External oscillation circuits
Hi-speed CF oscillation circuit (CF): For system clock, with internal Rf
Low speed crystal oscillation circuit (X’tal): For low-speed system clock / For Watchdog timer, with internal Rf
1) The CF and crystal oscillation circuits share the same pins. The active circuit is selected under program control.
2) Both the CF and crystal oscillator circuits stop operation on a system reset. After reset is released, oscillation
is stopped so start the oscillation operation by program.
System Clock Divider Function
Can run on low current.
The minimum instruction cycle selectable from 300ns, 600ns, 1.2s, 2.4s, 4.8s, 9.6s, 19.2s, 38.4s, and
76.8s (at a main clock rate of 10MHz).
Internal Reset Function
Power-on reset (POR) function
1) POR reset is generated only at power-on time.
2) The POR release level can be selected from 8 levels (1.67V, 1.97V, 2.07V, 2.37V, 2.57V, 2.87V, 3.86V, and
4.35V) through option configuration.
Low-voltage detection reset (LVD) function
1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls
below a certain level.
2) The use or disuse of the LVD function and the low voltage threshold level (7 levels: 1.91V, 2.01V, 2.31V, 2.51V,
2.81V, 3.79V, 4.28V) can be selected by optional configuration.
Standby Function
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are four ways of resetting the HALT mode.
(1) Setting the reset pin to the low level
(2) System resetting by low-voltage detection
(3) System resetting by watchdog timer
(4) Occurrence of an interrupt
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, low-/medium-/ Frequency variable RC, and crystal oscillators automatically stop operation.
Note: The oscillation of the low-speed RC oscillator is also controlled directly by the watchdog timer and its
standby-mode-time oscillation is also controlled.
2) There are five ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) System resetting by low-voltage detection
(3) System resetting by watchdog timer
(4) Having an interrupt source established at either INT0, INT1, INT2, INT4, INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(5) Having an interrupt source established at port 0.
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