Data Sheet SSM2604
Rev. A | Page 3 of 28
SPECIFICATIONS
T
A
= 25°C, AVDD = DVDD = 3.3 V, 1 kHz signal, f
S
= 48 kHz, PGA gain = 0 dB, 24-bit audio data, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Conditions
RECOMMENDED OPERATING CONDITIONS
Analog Voltage Supply (AVDD) 1.8 3.3 3.6 V
Digital Power Supply 1.5 3.3 3.6 V
Ground (AGND, DGND) 0 V
POWER CONSUMPTION
Power-Up
Stereo Record (1.5 V and 1.8 V) 7 mW
Stereo Record (3.3 V) 22 mW
Stereo Playback (1.5 V and 1.8 V) 7 mW
Stereo Playback (3.3 V) 22 mW
Power-Down 56 μW
LINE INPUT
Input Signal Level (0 dB)
1 × AVDD/3.3
V rms
Input Impedance 200 PGA gain = 0 dB
10 PGA gain = +33 dB
480 PGA gain = −34.5 dB
Input Capacitance 10 pF
Signal-to-Noise Ratio (A-Weighted)
90
dB
PGA gain = 0 dB, AVDD = 3.3 V
84 dB PGA gain = 0 dB, AVDD = 1.8 V
Total Harmonic Distortion (THD) 80 dB 1 dBFS input, AVDD = 3.3 V
75 dB 1 dBFS input, AVDD = 1.8 V
Channel Separation 80 dB
Programmable Gain 34.5 0 +33.5 dB
Gain Step 1.5 dB
Mute Attenuation 80 dB
LINE OUTPUT
DAC
1 dBFS input DAC + line output
Full-Scale Output 1 × AVDD/3.3 V rms
Signal-to-Noise Ratio (A-Weighted) 85 100 dB AVDD = 3.3 V
94 dB AVDD = 1.8 V
THD + N 80 75 dB AVDD = 3.3 V
75
dB
AVDD = 1.8 V
Power Supply Rejection Ratio 50 dB
Channel Separation 80 dB
LINE INPUT TO LINE OUTPUT
Full-Scale Output Voltage 1 × AVDD/3.3 V rms
Signal-to-Noise Ratio (A-Weighted) 92 dB AVDD = 3.3 V
86 dB AVDD = 1.8 V
Total Harmonic Distortion 80 dB AVDD = 3.3 V
80 dB AVDD = 1.8 V
Power Supply Rejection
50
dB
SSM2604 Data Sheet
Rev. A | Page 4 of 28
DIGITAL FILTER CHARACTERISTICS
Table 2.
Parameter Min Typ Max Unit Conditions
ADC FILTER
Pass Band 0 0.445 f
S
Hz ±0.04 dB
0.5 f
S
Hz 6 dB
Pass-Band Ripple ±0.04 dB
Stop Band 0.555 f
S
Hz
Stop-Band Attenuation 61 dB f > 0.567 f
S
High-Pass Filter Corner Frequency 3.7 Hz 3 dB
10.4 Hz 0.5 dB
21.6 Hz 0.1 dB
DAC FILTER
Pass Band 0 0.445 f
S
Hz ±0.04 dB
0.5 f
S
Hz 6 dB
Pass-Band Ripple ±0.04 dB
Stop Band 0.555 f
S
Hz
Stop-Band Attenuation
61
dB
f > 0.565 f
S
CORE CLOCK TOLERANCE
Frequency Range 8.0 13.8 MHz
Jitter Tolerance 50 ps
Data Sheet SSM2604
Rev. A | Page 5 of 28
TIMING CHARACTERISTICS
Table 3. I
2
C Timing
Limit
Parameter t
MIN
t
MAX
Unit Description
t
SCS
600 ns Start condition setup time
t
SCH
600 ns Start condition hold time
t
PH
600 ns SCLK pulse width high
t
PL
1.3 μs SCLK pulse width low
f
SCLK
0 526 kHz SCLK frequency
t
DS
100 ns Data setup time
t
DH
900 ns Data hold time
t
RT
300 ns SDIN and SCLK rise time
t
FT
300 ns SDIN and SCLK fall time
t
HCS
600 ns Stop condition setup time
06978-036
SCLK
SDIN
t
RT
t
SCH
t
PL
t
DS
t
PH
t
DH
t
FT
t
SCS
t
HCS
Figure 2. I
2
C Timing
Table 4. Digital Audio Interface Slave Mode Timing
Limit
Parameter t
MIN
t
MAX
Unit Description
t
DS
10 ns PBDAT setup time from BCLK rising edge
t
DH
10 ns PBDAT hold time from BCLK rising edge
t
LRSU
10 ns RECLRC/PBLRC setup time to BCLK rising edge
t
LRH
10 ns RECLRC/PBLRC hold time to BCLK rising edge
t
DD
30 ns RECDAT propagation delay from BCLK falling edge (external load of 70 pF)
t
BCH
25 ns BCLK pulse width high
t
BCL
25 ns BCLK pulse width low
t
BCY
50 ns BCLK cycle time
BCLK
PBLRC/
RECLRC
PBDAT
RECDAT
t
BCL
t
DS
t
LRSU
t
LRH
t
BCH
t
BCY
t
DD
t
DH
06978-025
Figure 3. Digital Audio Interface Slave Mode Timing

SSM2604CPZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Interface - CODECs Low Power w/ 24B ADC & 24B DAC
Lifecycle:
New from this manufacturer.
Delivery:
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