CY62128EV30 MoBL
®
Automotive
1-Mbit (128 K × 8) Static RAM
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-65528 Rev. *E Revised April 15, 2015
1-Mbit (128 K × 8) Static RAM
Features
Very high-speed: 45 ns
Temperature ranges:
Automotive-A: –40 °C to +85 °C
Automotive-E: –40 °C to +125 °C
Wide voltage range: 2.2 V to 3.6 V
Pin compatible with CY62128DV30
Ultra low standby power
Typical standby current: 1 A
Maximum standby current: 4 A
Ultra low active power
Typical active current: 1.3 mA at f = 1 MHz
Easy memory expansion with CE
1
, CE
2,
and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Offered in Pb-free 32-pin small outline integrated circuit (SOIC),
32-pin thin small outline package (TSOP) Type I, and 32-pin
STSOP packages
Functional Description
The CY62128EV30 is a high performance CMOS static RAM
module organized as 128K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power-down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device in standby mode reduces power consumption by more
than 99 percent when deselected (CE
1
HIGH or CE
2
LOW). The
eight input and output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
1
HIGH
or CE
2
LOW), the outputs are disabled (OE HIGH), or a write
operation is in progress (CE
1
LOW and CE
2
HIGH and WE
LOW).
To write to the device, take Chip Enable (CE
1
LOW and CE
2
HIGH) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins is then written into the location specified on the Address pin
(A
0
through A
16
).
To read from the device, take Chip Enable (CE
1
LOW and CE
2
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE
) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the I/O pins.
For a complete list of related resources, click here.
A
0
I/O
0
I/O
7
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
12
SENSE AMPS
POWER
DOWN
WE
OE
A
13
A
14
A
15
A
16
ROW DECODER
COLUMN DECODER
128K x 8
ARRAY
INPUT BUFFER
A
10
A
11
CE
1
CE
2
Logic Block Diagram
CY62128EV30 MoBL
®
Automotive
Document Number: 001-65528 Rev. *E Page 2 of 19
Contents
Pin Configuration .............................................................3
Product Portfolio ..............................................................3
Pin Definitions ..................................................................4
Maximum Ratings .............................................................5
Operating Range ...............................................................5
Electrical Characteristics .................................................5
Capacitance ......................................................................6
Thermal Resistance ..........................................................6
AC Test Loads and Waveforms .......................................6
Data Retention Characteristics .......................................7
Data Retention Waveform ................................................7
Switching Characteristics ................................................8
Switching Waveforms ......................................................9
Truth Table ......................................................................12
Ordering Information ......................................................13
Ordering Code Definitions .........................................13
Package Diagrams ..........................................................14
Acronyms ........................................................................17
Document Conventions .................................................17
Units of Measure .......................................................17
Document History Page .................................................18
Sales, Solutions, and Legal Information ......................19
Worldwide Sales and Design Support ....................... 19
Products ....................................................................19
PSoC® Solutions ......................................................19
Cypress Developer Community .................................19
Technical Support .....................................................19
CY62128EV30 MoBL
®
Automotive
Document Number: 001-65528 Rev. *E Page 3 of 19
Pin Configuration
Figure 1. 32-pin STSOP pinout
[1]
Figure 2. 32-pin TSOP I pinout
[1]
Figure 3. 32-pin SOIC pinout
[1]
A
6
A
7
A
16
A
14
A
12
WE
V
CC
A
4
A
13
A
8
A
9
OE
Top View
(not to scale)
30
28
29
31
24
19
23
22
21
20
18
13
17
16
15
14
11
12
I/O
2
I/O
1
GND
I/O
7
I/O
4
I/O
5
I/O
6
I/O
0
CE
1
A
11
A
5
9
10
32
1
2
3
4
5
6
7
8
CE
2
A
15
NC
A
10
I/O
3
A
1
A
0
A
3
A
2
26
25
26
27
A
6
A
7
A
16
A
14
A
12
WE
V
CC
A
4
A
13
A
8
A
9
OE
Top View
(not to scale)
1
6
2
3
4
5
7
32
27
31
30
29
28
26
21
25
24
23
22
19
20
I/O
2
I/O
1
GND
I/O
7
I/O
4
I/O
5
I/O
6
I/O
0
CE
1
A
11
A
5
17
18
8
9
10
11
12
13
14
15
16
CE
2
A
15
NC
A
10
I/O
3
A
1
A
0
A
3
A
2
1
2
3
4
5
6
7
8
9
10
11
14
19
20
24
23
22
21
25
28
27
26
Top View
12
13
29
32
31
30
16
15
17
18
GND
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
WE
V
CC
A
15
A
13
A
8
A
9
I/O
7
I/O
6
I/O
5
I/O
4
A
2
NC
I/O
0
I/O
1
I/O
2
CE
1
OE
A
10
I/O
3
A
1
A
0
A
11
CE
2
Product Portfolio
Product Range V
CC
Range (V)
Speed
(ns)
Power Dissipation
Operating I
CC
(mA)
Standby I
SB2
(µA)
f = 1 MHz f = f
max
Min Typ
[2]
Max Typ
[2]
Max Typ
[2]
Max Typ
[2]
Max
CY62128EV30LL Automotive-A 2.2 3.0 3.6 45 1.3 2.0 11 16 1 4
CY62128EV30LL Automotive-E 2.2 3.0 3.6 55 1.3 4.0 11 35 1 30

CY62128EV30LL-45ZAXA

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 1Mb 3V 45ns 128K x 8 LP SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union