AD7621
Rev. 0 | Page 27 of 32
APPLICATION
LAYOUT
While the AD7621 has very good immunity to noise on the
power supplies, exercise care with the grounding layout. To
facilitate the use of ground planes that can be easily separated,
design the printed circuit board that houses the AD7621 so that
the analog and digital sections are separated and confined to
certain areas of the board. Digital and analog ground planes
should be joined in only one place, preferably underneath the
AD7621, or as close as possible to the AD7621. If the AD7621 is
in a system where multiple devices require analog-to-digital
ground connections, the connections should still be made at
one point only, a star ground point, established as close as
possible to the AD7621.
To prevent coupling noise onto the die, avoid radiating noise,
and to reduce feedthrough:
Do not run digital lines under the device.
Do run the analog ground plane under the AD7621.
Do shield fast switching signals, like
CNVST
or clocks, with
digital ground to avoid radiating noise to other sections of
the board, and never run them near analog signal paths.
Avoid crossover of digital and analog signals.
Run traces on different but close layers of the board, at right
angles to each other, to reduce the effect of feedthrough
through the board.
The power supply lines to the AD7621 should use as large a
trace as possible to provide low impedance paths and reduce the
effect of glitches on the power supply lines. Good decoupling is
also important to lower the impedance of the supplies presented
to the AD7621, and to reduce the magnitude of the supply
spikes. Decoupling ceramic capacitors, typically 100 nF, should
be placed on each of the power supplies pins, AVDD, DVDD,
and OVDD. The capacitors should be placed close to, and
ideally right up against, these pins and their corresponding
ground pins. Additionally, low ESR 10 μF capacitors should be
located in the vicinity of the ADC to further reduce low
frequency ripple.
The DVDD supply of the AD7621 can be either a separate
supply or come from the analog supply, AVDD, or from the
digital interface supply, OVDD. When the system digital supply
is noisy, or fast switching digital signals are present, and no
separate supply is available, it is recommended to connect the
DVDD digital supply to the analog supply AVDD through an
RC filter, and to connect the system supply to the interface
digital supply OVDD and the remaining digital circuitry. Refer
to
Figure 23 for an example of this configuration. When DVDD
is powered from the system supply, it is useful to insert a bead
to further reduce high frequency spikes.
The AD7621 has four different ground pins: REFGND, AGND,
DGND, and OGND. REFGND senses the reference voltage and,
because it carries pulsed currents, should be a low impedance
return to the reference. AGND is the ground to which most
internal ADC analog signals are referenced; it must be
connected with the least resistance to the analog ground plane.
DGND must be tied to the analog or digital ground plane
depending on the configuration. OGND is connected to the
digital system ground.
The layout of the decoupling of the reference voltage is
important. To minimize parasitic inductances, place the
decoupling capacitor close to the ADC and connect it with
short, thick traces.
EVALUATING THE AD7621 PERFORMANCE
A recommended layout for the AD7621 is outlined in the
documentation of the EVAL-AD7621CB evaluation board for
the AD7621. The evaluation board package includes a fully
assembled and tested evaluation board, documentation, and
software for controlling the board from a PC via the EVAL-
CONTROLBRD3.
AD7621
Rev. 0 | Page 28 of 32
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-026BBC
TOP VIEW
(PINS DOWN)
1
12
13
25
24
36
37
48
0.27
0.22
0.17
0.50
BSC
LEAD PITCH
7.00
BSC SQ
1.60
MAX
0.75
0.60
0.45
VIEW A
9.00 BSC
SQ
PIN 1
0.20
0.09
1.45
1.40
1.35
0.08 MAX
COPLANARITY
VIEW A
ROTATED 90° CCW
SEATING
PLANE
3.5°
0.15
0.05
Figure 43. 48-Lead Low Profile Quad Flatpack (LQFP)
[ST-48]
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
PIN 1
INDICATOR
TOP
VIEW
6.75
BSC SQ
7.00
BSC SQ
1
48
12
13
37
36
24
25
5.25
5.10 SQ
4.95
0.50
0.40
0.30
0.30
0.23
0.18
0.50 BSC
12° MAX
0.20 REF
0.80 MAX
0.65 TYP
1.00
0.85
0.80
5.50
REF
0.05 MAX
0.02 NOM
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
COPLANARITY
0.08
SEATING
PLANE
0.25 MIN
EXPOSED
P
A
D
(BOTTOM VIEW)
PADDLE CONNECTED TO GND.
THIS CONNECTION IS NOT
REQUIRED TO MEET THE
ELECTRICAL PERFORMANCES
Figure 44. 48-Lead Lead Frame Chip Scale Package (LFCSP_VQ)
7 mm × 7 mm Body, Very Thin Quad
[CP-48-1]
Dimensions shown in millimeters
AD7621
Rev. 0 | Page 29 of 32
ORDERING GUIDE
Model Temperature Range Package Description Package Option
AD7621ACP −40°C to +85°C 48-Lead Lead Frame Chip Scale (LFCSP_VQ) CP-48-1
AD7621ACPRL −40°C to +85°C 48-Lead Lead Frame Chip Scale (LFCSP_VQ) CP-48-1
AD7621ACPZ
1
−40°C to +85°C 48-Lead Lead Frame Chip Scale (LFCSP_VQ) CP-48-1
AD7621ACPZRL
1
−40°C to +85°C 48-Lead Lead Frame Chip Scale (LFCSP_VQ) CP-48-1
AD7621AST −40°C to +85°C 48-Lead Low Profile Quad Flatpack (LQFP) ST-48
AD7621ASTRL −40°C to +85°C 48-Lead Low Profile Quad Flatpack (LQFP) ST-48
AD7621ASTZ
1
−40°C to +85°C 48-Lead Low Profile Quad Flatpack (LQFP) ST-48
AD7621ASTZRL
1
−40°C to +85°C 48-Lead Low Profile Quad Flatpack (LQFP) ST-48
EVAL-AD7621CB
2
Evaluation Board
EVAL-CONTROLBRD3
3
Controller Board
1
Z = Pb-free part.
2
This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes.
3
This board allows a PC to control and communicate with all Analog Devices, Inc. evaluation boards ending in the CB designators.

AD7621ACPZRL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16B 2LSB INL 3 MSPS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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