1©2015 Integrated Device Technology, Inc December 14, 2015
General Description
The 8312I is a low skew, 1-to-12 LVCMOS/ LVTTL Fanout Buffer
and a member of the family of High Performance Clock Solutions
from IDT. The 8312I single-ended clock input accepts LVCMOS or
LVTTL input levels. The low impedance LVCMOS outputs are
designed to drive 50 series or parallel terminated transmission
lines. The effective fanout can be increased from 12 to 24 by
utilizing the ability of the outputs to drive two series terminated
lines.
The 8312I is characterized at full 3.3V, 2.5V, and 1.8V, mixed
3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply
modes. Guaranteed output and part-to-part skew characteristics
along with the 1.8V output capabilities makes the 8312I ideal for
high performance, single ended applications that also require a
limited output voltage.
Features
• Twelve LVCMOS/LVTTL outputs
• CLK input supports the following input types: LVCMOS, LVTTL
• Maximum output frequency: 250MHz
• Output skew: 160ps (maximum)
• Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
1.8V/1.8V
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
8312I
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
V
DD
CLK_EN
CLK
GND
OE
V
DD
GND
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
Q11
V
DDO
Q10
GND
Q9
V
DDO
Q8
GND
V
DDO
Q1
GND
Q2
V
DDO
Q3
GND
Q0
Pin Assignment
D
LE
Q
Q[0:11]
CLK_EN
OE
CLK
Pullup
Pulldown
Pullup
12
Block Diagram
8312I
Datasheet
Low Skew, 1-to-12 LVCMOS/LVTTL
Fanout Buffer