[AK4104]
MS0642-E-01 2010/09
- 16 -
■ Register Map
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
00H Control 1 1 0 0 0 DIF1 DIF0 PW RSTN
01H Reserved 0 1 0 1 1 0 1 1
02H Control 2 0 0 0 0 0 MODE SEL1 SEL0
03H TX 1 0 0 0 0 0 V TXE
04H Channel Status Byte0 CS7 CS6 CS5 CS4 CS3 CS2 CS1 CS0
05H Channel Status Byte1 CS15 CS14 CS13 CS12 CS11 CS10 CS9 CS8
06H Channel Status Byte2 CS23 CS22 CS21 CS20 CS19 CS18 CS17 CS16
07H Channel Status Byte3 CS31 CS30 CS29 CS28 CS27 CS26 CS25 CS24
08H Channel Status Byte4 CS39 CS38 CS37 CS36 CS35 CS34 CS33 CS32
09H Channel Status Byte5 0 0 0 0 0 0 CS41 CS40
Notes:
For addresses from 0AH to 1FH, data must not be written.
When PDN pin goes “L”, the registers are initialized to their default values.
When RSTN bit goes “0”, the only internal timing is reset and the registers are not initialized to their default
values. All data can be written to the register even if PW or RSTN bit is “0”.
The “0” register should be written “0”, the “1” register should be written “1” data.
■ Register Definitions
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
00H Control 1 1 0 0 0 DIF1 DIF0 PW RSTN
R/W R/W
Default 1 0 0 0 1 1 1 1
RSTN: Internal timing reset control
0: Reset. All registers are not initialized.
1: Normal Operation
PW: Power down control
0: Power down. All registers are not initialized.
1: Normal Operation
DIF1-0: Audio data interface formats (
Table 2)
Initial: “11”, Mode 3
