[AK4104]
MS0642-E-01 2010/09
- 4 -
PIN/FUNCTION
No. Pin Name I/O Function
1 MCLK I Master Clock Input Pin
2 BICK I Audio Serial Data Clock Pin
3 SDTI1 I Audio Serial Data Input 1 Pin
4 LRCK I Input Channel Clock Pin
5 PDN I
Power Down and Reset Pin
“L”: Power down and Reset, “H”: Power up
6 CSN I Chip Select Pin
7 CCLK I Control Data Clock Pin
8 CDTI I Control Data Input Pin
9 TEST1 I
TEST Pin
This pin should be connected to VDD.
10 TEST2 O
TEST Pin
This pin should be OPEN.
11 TEST3 O
TEST Pin
This pin should be OPEN.
12 TEST4 O
TEST Pin
This pin should be OPEN.
13 VSS - Ground Pin
14 VDD -
Power Supply Pin, 2.7 3.6V
CDTO O Control Data Output Pin, The output is “Hi-Z” when PDN pin = “L”.
15
SDTI2 I Audio Serial Data Input 2 Pin
16 TX O
Transmit Channel Output Pin, The output is “L” when PDN pin = “L” or RSTN bit
=“0” or PW bit = “0” or MCLK stops.
Note: All digital input pins should not be left floating.
[AK4104]
MS0642-E-01 2010/09
- 5 -
ABSOLUTE MAXIMUM RATINGS
(VSS=0V; Note 1)
Parameter Symbol min max Units
Power Supply VDD 0.3 4.6 V
Input Current, Any Pin Except Supplies IIN - ±10 mA
Digital Input Voltage (Note 2) VIND 0.3 VDD+0.3 V
Ambient Temperature (Powered applied) Ta 20 85 °C
Storage Temperature Tstg 65 150 °C
Note 1. All voltages with respect to ground.
Note 2. MCLK, BICK, SDTI1, LRCK, PDN, CSN, CCLK, CDTI, SDTI2
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(VSS=0V; Note 1)
Parameter Symbol min typ max Units
Power Supply VDD 2.7 3.3 3.6 V
Note 1. All voltages with respect to ground.
WARNING: AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
DC CHARACTERISTICS
(Ta=25°C; VDD=2.7 3.6V)
Parameter Symbol min typ max Units
Power Supply Current (Note 3)
Normal Operation (PDN pin = “H”, fs=44.1kHz) (
Note 3)
Full power-down mode (PDN pin = “L”) (
Note 4)
0.9
10
1.8
50
mA
μA
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
70%VDD
-
-
-
-
30%VDD
V
V
High-Level Output Voltage (Iout=-80μA)
Low-Level Output Voltage (Iout=80µA)
VOH1
VOL1
VDD-0.4
-
-
-
-
0.4
V
V
Input Leakage Current Iin - -
± 10
µA
Note 3. TX pin: open . Power supply current (IDD@3.3V) is 1.0mA(typ)@fs=48kHz, 1.4mA(typ)@fs=96kHz and
2.6mA(typ)@fs=192kHz. IDD is 10µA(typ) if PDN= “L” and all other input pins are held to VSS(@3.3V).
(TX pin: 20pF, Power supply current (IDD@3.3V) is 3.3mA(typ)@fs=192kHz.)
Note 4. All digital input pins are fixed to VDD or VSS.
TX CHARACTERISTICS
(Ta=25°C; VDD=2.7 3.6V)
Parameter Symbol min typ max Units
High-Level Output Voltage ( Iout=-400μA)
Low-Level Output Voltage ( Iout=400μA)
VOH2
VOL2
VDD-0.4
-
-
-
-
0.4
V
V
Load Capacitance CL - - 50 pF
[AK4104]
MS0642-E-01 2010/09
- 6 -
SWITCHING CHARACTERISTICS
(Ta=25°C; VDD=2.7 3.6V, C
L
=20pF)
Parameter Symbol min typ max Units
Master Clock Frequency
Frequency
Duty Cycle
fCLK
dCLK
2.048
40
36.864
60
MHz
%
LRCK Frequency
Frequency
Duty Cycle
fs
dCLK
8
45
192
55
kHz
%
Audio Interface Timing
BICK Period
BICK Pulse Width Low
Pulse Width High
BICK “” to LRCK Edge (
Note 5)
LRCK Edge to BICK “ (
Note 5)
SDTI Hold Time
SDTI Setup Time
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
tSDS
81
30
30
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
Control Interface Timing
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “to CCLK “
CCLK “” to CSN “
CDTO Delay
CSN “” to CDTO Hi-Z
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tDCD
tCCZ
200
80
80
40
40
150
150
50
45
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Power-Down & Reset Timing
PDN Pulse Width (
Note 6)
tPD
150
ns
Note 5. BICK rising edge must not occur at the same time as LRCK edge.
Note 6. The AK4104 can be reset by bringing PDN pin = “L”.

AK4104ET

Mfr. #:
Manufacturer:
Description:
IC TX DGTL AUD 192KHZ 16TSSOP
Lifecycle:
New from this manufacturer.
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