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DD9C32_64x72A.fm - Rev. F 10/08 EN
9 ©2003 Micron Technology, Inc. All rights reserved.
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM UDIMM
Electrical Specifications
Idd Specifications
Table 9: Idd Specifications and Conditions – 256MB (Die Revision K)
Values are for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
Parameter/Condition Symbol -40B -335 Units
Operating one bank active-precharge current:
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address
and control inputs changing once every 2 clock cycles
Idd0 900 810 mA
Operating one bank active-read-precharge current: BL = 2;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); Iout = 0mA; Address and control inputs changing once per clock
cycle
Idd1 1080 1035 mA
Precharge power-down standby current: All device banks idle; Power-down
mode;
t
CK =
t
CK (MIN); CKE = LOW
Idd2P 36 36 mA
Idle standby current: CS# = HIGH; All device banks idle;
t
CK =
t
CK (MIN);
CKE = HIGH; Address and other control inputs changing once per clock cycle
;
Vin
=
Vref
for DQ, DM, and DQS
Idd2F 450 450 mA
Active power-down standby current: One device bank active; Power-down
mode;
t
CK =
t
CK (MIN); CKE = LOW
Idd3P 315 270 mA
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
RC =
t
RAS (MAX);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per
clock cycle; Address and other control inputs changing once per clock cycle
Idd3N 540 495 mA
Operating burst read current: BL = 2; Continuous burst reads; One device
bank active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); Iout = 0mA
Idd4R 1620 1440 mA
Operating burst write current: BL = 2; Continuous burst writes; One device
bank active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
Idd4W 1620 1440 mA
Auto refresh current
t
RFC =
t
RFC (MIN)
Idd5 1440 1440 mA
t
RFC = 7.8125µs
Idd5A 54 54 mA
Self refresh current: CKE ≤ 0.2V
Idd6 36 36 mA
Operating bank interleave read current: Four device bank interleaving reads
(BL = 4) with auto precharge;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); Address and
control inputs change only during active READ or WRITE commands
Idd7 2610 2430 mA
