ICS870S208BKLF REVISION A APRIL 3, 2013 7 ©2013 Integrated Device Technology, Inc.
ICS870S208 Data Sheet DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5%, T
A
= 0°C to 70°C
Table 4B. Power Supply DC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 2.5V ± 5%, T
A
= 0°C to 70°C
Table 4C. Power Supply DC Characteristics, V
DD
= 3.3V ± 5%, V
DDOA
= V
DDOB
= 2.5V ± 5%, T
A
= 0°C to 70°C
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, V
O
-0.5V to V
DDOA, B
+ 0.5V
Package Thermal Impedance,
JA
42.7C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
V
DDOA,
V
DDOB
Output Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current 80 mA
I
DDOA,
I
DDOB
Output Supply Current No Load 1 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 2.375 2.5 2.625 V
V
DDOA,
V
DDOB
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Power Supply Current 80 mA
I
DDOA,
I
DDOB
Output Supply Current No Load 1 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
V
DDOA,
V
DDOB
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Power Supply Current 80 mA
I
DDOA,
I
DDOB
Output Supply Current No Load 1 mA
ICS870S208BKLF REVISION A APRIL 3, 2013 8 ©2013 Integrated Device Technology, Inc.
ICS870S208 Data Sheet DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
Table 4D. LVCMOS/LVTTL DC Characteristics, T
A
= 0°C to 70°C
NOTE 1: Outputs are terminated with 50 to V
DDOA, B
/2. See Parameter Measurement section, Load Test Circuit diagrams.
Table 4E. Differential DC Characteristics, V
DD
= 3.3V ± 5% or 2.5V ± 5%, T
A
= 0°C to 70°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as V
IH
.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
V
DD
= 3.3V ± 5% 2.2 V
DD
+ 0.3 V
V
DD
= 2.5V ± 5% 1.7 V
DD
+ 0.3 V
V
IL
Input Low Voltage
V
DD
= 3.3V ± 5% -0.3 0.8 V
V
DD
= 2.5V ± 5% -0.3 0.7 V
I
IH
Input
High Current
CLK_SEL,
DIV_SELA,
DIV_SELB
V
DD
= V
IN
= 3.465V or 2.625V 150 µA
OE_A[0:3],
OE_B[0:3]
V
DD
= V
IN
= 3.465V or 2.625V 10 µA
I
IL
Input
Low Current
CLK_SEL,
DIV_SELA,
DIV_SELB
V
DD
= 3.465V or 2.625V, V
IN
= 0V -10 µA
OE_A[0:3],
OE_B[0:3]
V
DD
= 3.465V or 2.625V, V
IN
= 0V -150 µA
V
OH
Output High Voltage;
NOTE 1
V
DDOA, VDDOB
= 3.465V 2.6 V
V
DDOA, VDDOB
= 2.625V 1.8 V
V
OL
Output Low Voltage;
NOTE 1
V
DDOA, VDDOB
= 3.465V or 2.625V 0.55 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input
High Current
nCLK0,
nCLK1
V
DD
= V
IN
= 3.465V or 2.625V 10 µA
CLK0,
CLK1
V
DD
= V
IN
= 3.465V or 2.625V 150 µA
I
IL
Input
Low Current
nCLK0,
nCLK1
V
DD
= 3.465V or 2.625V, V
IN
= 0V -150 µA
CLK0,
CLK1
V
DD
= 3.465V or 2.625V, V
IN
= 0V -10 µA
V
PP
Peak-to-Peak Voltage;
NOTE 1
0.15 1.3 V
V
CMR
Common Mode Input
Voltage; NOTE 1, 2
GND + 0.5 V
DD
– 0.85 V
ICS870S208BKLF REVISION A APRIL 3, 2013 9 ©2013 Integrated Device Technology, Inc.
ICS870S208 Data Sheet DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5% = T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Measured from the differential input crosspoint to V
DDOA, B
/2 of the output.
NOTE 2: Defined as between outputs at the same supply voltage and with equal load conditions. Measured at V
DDOA, B
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency
and with equal load conditions. Using the same type of input on each device, the output is measured at V
DDOA, B
/2.
NOTE 5: Defined as skew within a bank of outputs at the same voltage and with equal load conditions.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
Table 5B. AC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 2.5V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Measured from the differential input crosspoint to V
DDOA, B
/2 of the output.
NOTE 2: Defined as between outputs at the same supply voltage and with equal load conditions. Measured at V
DDOA, B
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency
and with equal load conditions. Using the same type of input on each device, the output is measured at V
DDOA, B
/2.
NOTE 5: Defined as skew within a bank of outputs at the same voltage and with equal load conditions.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
out
Output Frequency 250 MHz
t
PD
Propagation Delay; NOTE 1 2.3 3.8 ns
tsk(o) Output Skew; NOTE 2, 3 120 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 225 ps
tsk(b)
Bank Skew;
NOTE 3, 5
QA[0:3], nQA[0:3] 65 ps
QB[0:3], nQB[0:3] 60 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 150 600 ps
t
EN
Output Enable Time; NOTE 6 10 ns
t
DIS
Output Disable Time; NOTE 6 10 ns
odc Output Duty Cycle 45 55 %
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
out
Output Frequency 250 MHz
t
PD
Propagation Delay; NOTE 1 2.4 4.0 ns
tsk(o) Output Skew; NOTE 2, 3 135 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 225 ps
tsk(b)
Bank Skew;
NOTE 3, 5
QA[0:3], nQA[0:3] 70 ps
QB[0:3], nQB[0:3] 60 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 150 600 ps
t
EN
Output Enable Time; NOTE 6 10 ns
t
DIS
Output Disable Time; NOTE 6 10 ns
odc Output Duty Cycle 44 56 %

870S208BKLFT

Mfr. #:
Manufacturer:
Description:
Clock Buffer 8 LVCMOS OUTPUT BUFFER/DIVIDER
Lifecycle:
New from this manufacturer.
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