HMC8205BF10 Data Sheet
Rev. C | Page 12 of 14
APPLICATIONS INFORMATION
The first and second stage drain bias voltages are applied via the
V
DD
1 and V
DD
2 pins, respectively, and the second stage gate bias
voltage is applied via the V
GG
1 pin. A single supply can be used
for both drains. Capacitive bypassing of all drain and gate pins
is required (see Figure 39). When the HMC8205BF10 is used in
a 50 Ω system, external matching components are not required
for the RFIN and RFOUT ports.
The following is the recommended power-up bias sequence:
1. Connect to ground.
2. Set V
GG
1 to −8 V to pinch off the second stage drain
current, I
DD
2.
3. Set V
DD
1 and V
DD
2 to 50 V (I
DD
2 is pinched off, and the
first stage drain current I
DD
1 is approximately 400 mA).
4. Adjust V
GG
1 with a more positive voltage (approximately
−2.5 V) until a total quiescent I
DQ
= I
DD
1 + I
DD
2 = 1300 mA
is obtained.
5. Apply the RF signal.
The following is the recommended power-down bias sequence:
1. Turn off the RF signal.
2. Set V
GG
1 to −8 V to pinch off I
DD
2 (I
DD
1 remains
approximately 400 mA).
3. Set V
DD
1 and V
DD
2 to 0 V.
4. Set V
GG
1 t o 0 V.
Unless otherwise noted, all measurements and data shown in
this data sheet were taken using the evaluation PCB shown in
Figure 39. The bias conditions, shown in Table 1 and Table 2,
are the operating points recommended to optimize the overall
performance of the HMC8205BF10.
Unless otherwise noted, the data shown in the Specifications
section was taken using the recommended bias conditions.
Operation of the HMC8205BF10 at other bias conditions can
provide performance that differs from what is shown in this
data sheet. Some applications can benefit from the reduced
power consumption afforded by the use of lower drain voltages
and/or lower drain currents. To understand the trade-offs
between power consumption and performance, see Theory of
Operation section.
The evaluation printed circuit board (PCB) provides the
HMC8205BF10 (see Figure 39), allowing easy operation using
standard dc power supplies and 50 Ω RF test equipment.
APPLICATION CIRCUIT
1
2
3
4
5
V
DD
2
RFIN
NC
NC
NC
NC
RFOUT
10
9
8
7
6
PACKAGE BASE
GND
C2
1µF
C3
0.01µF
C6
100pF
C8
0.01µF
C11
1µF
C5
100pF
C7
0.01µF
C9
1µF
C12
1µF
HMC8205BF10
13790-020
V
GG
1
V
DD
1
Figure 39. Typical Application Circuit
