1
DATASHEET
Single Supply/Low Power/256-Tap/SPI Bus, Quad
Digitally-Controlled (XDCP™) Potentiometer
X9251
The X9251 integrates four digitally controlled potentiometers
(XDCP) on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and four nonvolatile
Data Registers that can be directly written to and read by the
user. The content of the WCR controls the position of the wiper.
At power-up, the device recalls the content of the default Data
Registers of each DCP (DR00, DR10, DR20, and DR30) to the
corresponding WCR.
The XDCP can be used as a three terminal potentiometer or as
a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
• Four potentiometers in one package
• 256 resistor taps–0.4% resolution
• SPI serial interface for write, read, and transfer operations of
the potentiometer
• Wiper resistance: 100Ω typical at V
CC
= 5V
• 4 Nonvolatile data registers for each potentiometer
• Nonvolatile storage of multiple wiper positions
• Standby current <5µA max
•V
CC
: 2.7V to 5.5V operation
• 50kΩ version of total resistance
• 100 year data retention
• Single supply version of X9250
• Endurance: 100,000 data changes per bit per register
• 24 Ld SOIC, 24 Ld TSSOP
•Low power CMOS
• Pb-free (RoHS compliant)
POWER UP,
INTERFACE
CONTROL
AND
V
CC
V
SS
SPI
R
H0
R
L0
DCP0
R
W0
A1
SO
SI
CS
HOLD
SCK
WP
WCR0
DR00
DR01
DR02
DR03
R
H1
R
L1
DCP1
R
W1
WCR1
DR10
DR11
DR12
DR13
R
H2
R
L2
DCP2
R
W2
WCR2
DR20
DR21
DR22
DR23
R
H3
R
L3
DCP3
R
W3
WCR3
DR30
DR31
DR32
DR33
A0
Interface
STATUS
FIGURE 1. FUNCTIONAL DIAGRAM
December 3, 2014
FN8166.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
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