X9251
13
FN8166.6
December 3, 2014
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Equivalent AC Load Circuit
Endurance and Data Retention
PARAMETER MIN UNITS
Minimum endurance 100,000 Data changes per bit per register
Data retention 100 years
Capacitance
SYMBOL TEST TEST CONDITIONS TYP UNITS
C
IN/OUT
(Note 14) Input/Output capacitance (SI) V
OUT
= 0V 8 pF
C
OUT
(Note 14) Output capacitance (SO) V
OUT
= 0V 8 pF
C
IN
(Note 14) Input capacitance (A0, A1, CS, WP, HOLD, and SCK) V
IN
= 0V 6 pF
Power-Up Timing
SYMBOL PARAMETER MIN MAX UNITS
t
r
V
CC
(Note 14) V
CC
Power-up Rate 0.2 V/ms
t
PUR
(Note 15) Power-up to Initiation of Read Operation 1 ms
t
PUW
(Note 15) Power-up to Initiation of Write Operation 50 ms
AC Test Conditions
Input Pulse Levels V
CC
x 0.1 to V
CC
x 0.9
Input Rise and Fall Times 10ns
Input and Output Timing Level V
CC
x 0.5
NOTES:
9. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
10. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is a
measure of the error in step size.
11. MI = RTOT/255 or (R
H
- R
L
)/255, single pot.
12. During power up V
CC
> V
H
, V
L
, and V
W
.
13. n = 0, 1, 2, …,255; m = 0, 1, 2, …, 254.
14. This parameter is not 100% tested
15. t
PUR
and t
PUW
are the delays required from the time the (last) power supply (V
CC
-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and not 100% tested.
R
H
10pF
C
L
C
L
R
W
R
TOTAL
C
W
25pF
10pF
R
L
SPICE MACROMODELV
CC
2kΩ
10pF
SO PIN
2kΩ
