NCV7520
www.onsemi.com
25
Table 18. I/O TRUTH TABLE
Inputs Outputs*
POR RSTB ENB CSB IN
X
G
X
DRN
X
GAT
X
FLTB ST[2:0] COMMENT
0 X X X X →0 X →L →Z →111 POR RESET
1 0 X X X X X L Z 111 RSTB
1 1 1 X X G
X
X L Z ST[2:0] ENB
1 1→0 0 X X →0 X →L →Z →111 RSTB RESET
1 1 0→1 X X G
X
X →L →Z ST[2:0] ENB DISABLE
1 1 0 X 0 0 > V
OL
L Z ST[2:0] FLTB RESET
1 1 0 1 0 0 V
SG
< V < V
OL
L L → 011 FLTB SET − OLF
1 1 0 1→0 0 0 V
SG
< V < V
OL
L L→Z 011 FLTB RESET
1 1 0 0→1 0
0
V
SG
< V < V
OL
L Z→L 011 FLTB SET
1 1 0 1 0 0 < V
SG
L L → 010 FLTB SET − SCG
1 1 0 1→0 0 0 < V
SG
L L→Z 010 FLTB RESET
1 1 0 0→1 0
0
< V
SG
L Z→L 010 FLTB SET
1 1 0 X 1 X < V
FLTREF
H Z ST[2:0] FLTB RESET
1 1 0 1 1 X > V
FLTREF
L L → 001 FLTB SET − SCB
1 1 0 1→0 1
X > V
FLTREF
L L→Z
001
FLTB RESET
1 1 0 0→1 1
X > V
FLTREF
L Z→L
001
FLTB SET
1 1 0 1 X
1
< V
FLTREF
H Z ST[2:0] FLTB RESET
1 1 0 1 X 1 > V
FLTREF
L L → 001 FLTB SET − SCB
1 1 0 1→0 X 1 > V
FLTREF
L L→Z 001 FLTB RESET
1 1 0 0→1 X 1 > V
FLTREF
L Z→L 001 FLTB SET
*Output states after blanking and filter timers end and when channel is set to latch−off mode.
APPLICATION GUIDELINES
General
Unused DRN
X
inputs should be connected to V
LOAD
to
prevent false open load faults. Unused parallel inputs should
be connected to GND and unused reset or enable inputs
should be connected to V
CC1
or GND respectively. The
user’s software should be designed to ignore fault
information for unused channels. For best shorted−load
detection accuracy, the external MOSFET source terminals
should be star−connected and the NCV7520’s GND pin, and
the lower resistor in the fault reference voltage divider
should be Kelvin connected to the star (see Figure 2).
Consideration of auto−retry fault recovery behavior is
necessary from a power dissipation viewpoint (for both the
NCV7520 and the MOSFETs) and also from an EMI
viewpoint.
Driver slew rate and turn−on/off symmetry can be
adjusted externally to the NCV7520 in each channel’s gate
circuit by the use of series resistors for slew control, or
resistors and diodes for symmetry. Any benefit of EMI
reduction by this method comes at the expense of increased
switching losses in the MOSFETs.
The channel fault blanking timers must be considered
when choosing external components (MOSFETs, slew
control resistors, etc.) to avoid false faults. Component
choices must ensure that gate circuit charge/discharge times
stay within the turn−on/turn−off blanking times.
The NCV7520 does not have integral drain−gate flyback
clamps. Self−clamped MOSFET products, such as
ON Semiconductor’s NIF9N05CL or NCV8440A devices,
are recommended when driving unclamped inductive loads.
This flexibility allows choice of MOSFET clamp voltages
suitable to each application.
