MAX7302
SMBus/I
2
C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
______________________________________________________________________________________ 25
Applications Information
Hot Insertion
Serial interfaces SDA, SCL, and AD0 remain high
impedance with up to 6V asserted on them when the
MAX7302 is powered down (V
DD
= 0V) independent of
the voltages on the port supply V
LA
. When V
DD
= 0V, or
if V
DD
falls below the MAX7302’s reset threshold, all I/O
ports become high impedance. The ports remain high
impedance to signals between 0V and the port supply
V
LA
. If a signal outside this range is applied to a port,
the port’s protection diodes clamp the input signal to
V
LA
or 0V, as appropriate. If supply V
LA
is lower than
the input signal, the port pulls up V
LA
and the protec-
tion diode effectively powers any load on V
LA
from the
input signal. This behavior is safe if the current through
each protection diode is limited to 10mA.
If it is important that I/O ports remain high impedance
when all the supplies are powered down, including the
port supply V
LA
, then ensure that there is no direct or
parasitic path for MAX7302 input signals to drive current
into either the regulator providing V
LA
or other circuits
powered from V
LA
. One simple way to achieve this is
with a series small-signal Schottky diode, such as the
BAT54, between the port supply and the V
LA
input.
Output Level Translation
The open-drain output configuration of the ports allows
them to level translate the outputs to lower (but not
higher) voltages than the V
LA
supply. An external
pullup resistor converts the high-impedance, logic-high
condition to a positive voltage level. Connect the resis-
tor to any voltage up to V
LA
. For interfacing CMOS
inputs, a pullup resistor value of 220kΩ is a good start-
ing point. Use a lower resistance to improve noise
immunity, in applications where power consumption is
less critical, or where a faster rise time is needed for a
given capacitive load.
Driving LED Loads
When driving LEDs, use a resistor in series with the
LED to limit the LED current to no more than 25mA.
Choose the resistor value according to the following
formula:
R
LED
= (V
SUPPLY
- V
LED
- V
OL
) / I
LED
where:
R
LED
is the resistance of the resistor in series with
the LED (Ω)
V
SUPPLY
is the supply voltage used to drive the
LED (V)
V
LED
is the forward voltage of the LED (V)
V
OL
is the output low voltage of the MAX7302
when sinking I
LED
(V)
I
LED
is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 20mA from a
5V supply, R
LED
= (5 - 2.2 - 0.8) / 0.020 = 100Ω.
Driving Load Currents Higher than 25mA
The MAX7302 can sink current from loads drawing
more than 25mA by sharing the load across multiple
ports configured as open-drain outputs. Use at least
one output per 25mA of load current; for example, drive
a 90mA white LED with four ports.
The register structure of the MAX7302 allows only one
port to be manipulated at a time. Do not connect ports
directly in parallel because multiple ports cannot be
switched high or low at the same time, which is neces-
sary to share a load safely. Multiple ports can drive
high-current LEDs because each port can use its own
external current-limiting resistor to set that port’s cur-
rent through the LED.
The exceptions to this paralleling rule are the four ports,
P2–P5, and the four ports, P6–P9. These groups of four
ports can be programmed simultaneously through the
pseudoregisters 0x3C and 0x3D, respectively. A write
access to 0x3C writes the same data to registers 0x02
through 0x05. A write access to 0x3D writes the same
data to registers 0x06 through 0x09. Either of these
groups of four ports can be paralleled to drive a load
up to 100mA.
Power-Supply Considerations
The MAX7302 operates with a V
DD
power-supply voltage
of 1.62V to 3.6V. Bypass V
DD
to GND with a 0.047µF
capacitor as close as possible to the device. The port
supply V
LA
is connected to a supply voltage between
1.62V to 5.5V and bypassed with a 0.1µF capacitor as
close as possible to the device. The V
DD
supply and port
supply are independent and can be connected to differ-
ent voltages or the same supply as required.
Power supplies V
DD
and V
LA
can be sequenced in
either order or together.
MAX7302
SMBus/I
2
C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
26 ______________________________________________________________________________________
RST
P1/INT
RST
P1/INT
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
LA
V
DD
SDA
SCL
P9
P8
P7
GND
P6
MAX7302
QSOP
ADO
P3/OSCOUT
P2/OSCIN
P4
P5
15
16
14
13
5
6
7
P2/OSCIN
P3/OSCOUT
8
P8
P7
SCL
13
V
DD
4
12 10 9
V
LA
AD0
GND
P6
*EP
*EP = Exposed pad.
P5
P4
MAX7302
P9
2
11
SDA
TQFN
TOP VIEW
+
+
Pin Configurations
Chip Information
PROCESS: BiCMOS
MAX7302
SMBus/I
2
C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
______________________________________________________________________________________ 27
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
QSOP.EPS

MAX7302ATE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders 9-Port Level-Trans GPIO & LED Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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