3
FN2951.4
October 1, 2015
Pin Descriptions
PIN
NUMBER TYPE SYMBOL NAME DESCRIPTION
1 I BZl Bipolar Zero Input Used in conjunction with pin 2, Bipolar One Input (BOl), to input Manchester II encoded
data to the decoder, BZI and BOl are logical complements. When using pin 3, Unipolar
Data Input (UDI) for data input, BZI must be held high.
2 I BOl Bipolar One Input Used in conjunction with pin 1, Bipolar Zero Input (BZI), to input Manchester II encoded
data to the decoder, BOI and BZI are logical complements. When using pin 3, Unipolar
Data Input (UDI) for data input, BOl must be held low.
3 I UDI Unipolar Data Input An alternate to bipolar input (BZl, BOl), Unipolar Data Input (UDl) is used to input
Manchester II encoded data to the decoder. When using pin 1 (BZl) and pin 2 (BOl) for
data input, UDI must be held low.
4 I/O SD/CDS Serial Data/Command
Data Sync
In the converter mode, SD/CDS is an input used to receive serial NRZ data. NRZ data is
accepted synchronously on the falling edge of encoder clock output (ECLK). In the
repeater mode, SD/CDS is an output indicating the status of last valid sync pattern
received. A high indicates a command sync and a low indicates a data sync pattern.
5 O SDO Serial Data Out The decoded serial NRZ data is transmitted out synchronously with the decoder clock
(DCLK). SDO is forced low when RST
is low.
6 O SRST
Serial Reset In the converter mode, SRST follows RST. In the repeater mode, when RST goes low,
SRST
goes low and remains low after RST goes high. SRST goes high only when RST
is high, the reset bit is zero, and a valid synchronization sequence is received.
7ONVM
Nonvalid Manchester A low on NVM indicates that the decoder has received invalid Manchester data and
present data on Serial Data Out (SDO) is invalid. A high indicates that the sync pulse and
data were valid and SDO is valid. NVM
is set low by a low on RST, and remains low after
RST
goes high until valid sync pulse followed by two valid Manchester bits is received.
8 O DCLK Decoder Clock The decoder clock is a 1X clock recovered from BZl and BOl, or UDI to synchronously
output received NRZ data (SDO).
9IRST
Reset In the converter mode, a low on RST forces SDO, DCLK, NVM, and SRST low. A high on
RST
enables SDO and DCLK, and forces SRST high. NVM remains low after RST goes
high until a valid sync pulse followed by two Manchester bits is received, after which it
goes high. In the repeater mode, RST
has the same effect on SDO, DCLK and NVM as
in the converter mode. When RST
goes low, SRST goes low and remains low after RST
goes high. SRST
goes high only when RST is high, the reset bit is zero and a valid
synchronization sequence is received.
10 I GND Ground Ground
11 O C
O
Clock Output Buffered output of clock input I
X
. May be used as clock signal for other peripherals.
12 I I
X
Clock Input I
X
is the input for an external clock or, if the internal oscillator is used, I
X
and O
X
are used
for the connection of the crystal.
13 O O
X
Clock Drive If the internal oscillator is used, O
X
and I
X
are used for the connection of the crystal.
14 I MS Mode Select MS must be held low for operation in the converter mode, and high for operation in the
repeater mode.
15 I CTS
Clear to Send In the converter mode, a high disables the encoder, forcing outputs BOO, BZO high and
ECLK low. A high to low transition of CTS
initiates transmission of a Command sync pulse.
A low on CTS
enables BOO, BZO, and ECLK. In the repeater mode, the function of CTS
is identical to that of the converter mode with the exception that a transition of CTS
does
not initiate a synchronization sequence.
16 O ECLK Encoder Clock In the converter mode, ECLK is a 1X clock output used to receive serial NRZ data to
SD/CDS. In the repeater mode, ECLK is a 2X clock which is recovered from BZl and BOl
data by the digital phase locked loop.
17 I SS Speed Select A logic high on SS sets the data rate at 1/32 times the clock frequency while a low sets
the data rate at 1/16 times the clock frequency.
18 O BZO
Bipolar Zero Output BZO and its logical complement BOO are the Manchester data outputs of the encoder.
The inactive state for these outputs is in the high state.
19 O BOO
Bipolar One Out See pin 18.
20 I V
CC
V
CC
V
CC
is the +5V power supply pin. A 0.1µF decoupling capacitor from V
CC
(pin 20) to GND
(pin 10) is recommended.
NOTE: (I) Input (O) Output
HD-6409HD-6409
