4
FN2951.4
October 1, 2015
Encoder Operation
The encoder uses free running clocks at 1X and 2X the data
rate derived from the system clock l
X
for internal timing. CTS
is used to control the encoder outputs, ECLK, BOO
and
BZO
. A free running 1X ECLK is transmitted out of the
encoder to drive the external circuits which supply the NRZ
data to the MED at pin SD/CDS.
A low on CTS
enables encoder outputs ECLK, BOO and
BZO
, while a high on CTS forces BZO, BOO high and holds
ECLK low. When CTS
goes from high to low , a
synchronization sequence is transmitted out on BOO
and
BZO
. A synchronization sequence consists of eight
Manchester “0” bits followed by a command sync pulse.
A command sync pulse is a 3-bit wide pulse with the first 1
1/2 bits high followed by 1 1/2 bits low. Serial NRZ data is
clocked into the encoder at SD/CDS on the high to low
transition of ECLK during the command sync pulse. The
NRZ data received is encoded into Manchester II data and
transmitted out on BOO
and BZO following the command
sync pulse. Following the synchronization sequence,
input data is encoded and transmitted out continuously
without parity check or word framing. The length of the data
block encoded is defined by CTS
. Manchester data out is
inverted.
Decoder Operation
The decoder requires a single clock with a frequency 16X or
32X the desired data rate. The rate is selected on the speed
select with SS low producing a 16X clock and high a 32X
clock. For long data links the 32X mode should be used as
this permits a wider timing jitter margin. The internal
operation of the decoder utilizes a free running clock
synchronized with incoming data for its clocking.
The Manchester II encoded data can be presented to the
decoder in either of two ways. The Bipolar One and Bipolar
Zero inputs will accept data from differential inputs such as a
comparator sensed transformer coupled bus. The Unipolar
Data input can only accept noninverted Manchester II
encoded data i.e. Bipolar
One Out through an inverter to
Unipolar Data Input. The decoder continuously monitors this
data input for valid sync pattern. Note that while the MED
encoder section can generate only a command sync pattern,
the decoder can recognize either a command or data sync
pattern. A data sync is a logically inverted command sync.
There is a three bit delay between UDI, BOl, or BZI input and
the decoded NRZ data transmitted out of SDO.
Control of the decoder outputs is provided by the RST
pin.
When RST
is low, SDO, DCLK and NVM are forced low.
When RST
is high, SDO is transmitted out synchronously
with the recovered clock DCLK. The NVM
output remains
low after a low to high transition on RST
until a valid sync
pattern is received.
The decoded data at SDO is in NRZ format. DCLK is
provided so that the decoded bits can be shifted into an
external register on every high to low transition of this clock.
Three bit periods after an invalid Manchester bit is received
on UDI, or BOl, NVM
goes low synchronously with the
questionable data output on SDO. FURTHER, THE
DECODER DOES NOT RE-ESTABLISH PROPER DATA
DECODING UNTIL ANOTHER SYNC PATTERN IS
RECOGNIZED.
1
2
3
4
CTS
ECLK
SD/CDS
BZO
BOO
t
CE6
0 000 00 00
t
CE5
SYNCHRONIZATION SEQUENCE
EIGHT “0’s”
COMMAND
SYNC
DON’T CARE
‘1’ ‘0’ ‘1’
‘1’ ‘0’ ‘1’
FIGURE 1. ENCODER OPERATION
1
2
3
4
HD-6409HD-6409
5
FN2951.4
October 1, 2015
Repeater Operation
Manchester Il data can be presented to the repeater in either
of two ways. The inputs Bipolar One In and Bipolar Zero In
will accept data from differential inputs such as a comparator
or sensed transformer coupled bus. The input Unipolar Data
In accepts only noninverted Manchester II coded data. The
decoder requires a single clock with a frequency 16X or 32X
the desired data rate. This clock is selected to 16X with
Speed Select low and 32X with Speed Select high. For long
data links the 32X mode should be used as this permits a
wider timing jitter margin.
The inputs UDl, or BOl, BZl are delayed approximately 1/2
bit period and repeated as outputs BOO
and BZO. The 2X
ECLK is transmitted out of the repeater synchronously with
BOO
and BZO.
A low on CTS
enables ECLK, BOO, and BZO. In contrast to
the converter mode, a transition on CTS does not initiate a
synchronization sequence of eight 0’s and a command sync.
The repeater mode does recognize a command or data sync
pulse. SD/CDS is an output which reflects the state of the
most recent sync pulse received, with high indicating a
command sync and low indicating a data sync.
When RST
is low, the outputs SDO, DCLK, and NVM are
low, and SRST
is set low. SRST remains low after RST goes
high and is not reset until a sync pulse and two valid
manchester bits are received with the reset bit low. The reset
bit is the first data bit after the sync pulse. With RST high,
NRZ Data is transmitted out of Serial Data Out
synchronously with the 1X DCLK.
FIGURE 2. DECODER OPERATION
DCLK
UDI
SDO
RST
NVM
COMMAND
SYNC
1001010101010
FIGURE 3. REPEATER OPERATION
INPUT
COUNT
ECLK
UDI
BZO
BOO
RST
SRST
SYNC PULSE
1 234 567
HD-6409HD-6409
6
FN2951.4
October 1, 2015
Manchester Code
Nonreturn-to-Zero (NRZ) code represents the binary values
logic-O and Iogic-1 with a static level maintained throughout
the data cell. In contrast, Manchester code represents data
with a level transition in the middle of the data cell.
Manchester has bandwidth, error detection, and
synchronization advantages over NRZ code.
The Manchester II code Bipolar One and Bipolar Zero shown
below are logical complements. The direction of the
transition indicates the binary value of data. A logic-0 in
Bipolar One is defined as a Low to high transition in the
middle of the data cell, and a logic-1 as a high to low mid bit
transition, Manchester Il is also known as Biphase-L code.
The bandwidth of NRZ is from DC to the clock frequency fc/2,
while that of Manchester is from fc/2 to fc. Thus, Manchester
can be AC or transformer coupled, which has considerable
advantages over DC coupling. Also, the ratio of maximum to
minimum frequency of Manchester extends one octave, while
the ratio for NRZ is the range of 5 to 10 octaves. It is much
easier to design a narrow band than a wideband amp.
Secondly, the mid bit transition in each data cell provides the
code with an effective error detection scheme. If noise
produces a logic inversion in the data cell such that there is
no transition, an error indiction is given, and synchronization
must be re-established. This places relatively stringent
requirements on the incoming data.
The synchronization advantages of using the HD-6409 and
Manchester code are several fold. One is that Manchester is
a self clocking code. The clock in serial data communication
defines the position of each data cell. Non self clocking
codes, as NRZ, often require an extra clock wire or clock
track (in magnetic recording). Further, there can be a phase
variation between the clock and data track. Crosstalk
between the two may be a problem. In Manchester, the
serial data stream contains both the clock and the data, with
the position of the mid bit transition representing the clock,
and the direction of the transition representing data. There is
no phase variation between the clock and the data.
A second synchronization advantage is a result of the
number of transitions in the data. The decoder
resynchronizes on each transition, or at least once every
data cell. In contrast, receivers using NRZ, which does not
necessarily have transitions, must resynchronize on frame
bit transitions, which occur far less often, usually on a
character basis. This more frequent resynchronization
eliminates the cumulative effect of errors over successive
data cells. A final synchronization advantage concerns the
HD-6409’s sync pulse used to initiate synchronization. This
three bit wide pattern is sufficiently distinct from Manchester
data that a false start by the receiver is unlikely.
FIGURE 4. MANCHESTER CODE
BIT PERIOD
BINARY CODE
NONRETURN
TO ZERO
BIPOLAR ONE
BIPOLAR ZERO
123 45
011 00
Crystal Oscillator Mode
FIGURE 5. CRYSTAL OSCILLATOR MODE
LC Oscillator Mode
FIGURE 6. LC OSCILLATOR MODE
I
X
O
X
X1R1C0
16MHz
C1
C1
C
O
C1 = 32pF
C0 = CRYSTAL + STRAY
X1 = AT CUT PARALLEL
RESONANCE
FUNDAMENTAL
MODE
R
S
(TYP) = 30
R1 = 15M
C1
C1
L
C
E
C1 2C0
2
--------------------------
f
O
1
2 LC
e
-----------------------
C1 = 20pF
C0 = 5pF
I
X
O
X
HD-6409HD-6409

HD9P6409-9Z

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Encoders, Decoders, Multiplexers & Demultiplexers W/ANNEAL ENC/DEC 1MHZ 20 -40+85C
Lifecycle:
New from this manufacturer.
Delivery:
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