7
FN2951.4
October 1, 2015
Using the 6409 as a Manchester Encoded UART
V
CC
BOO
BZO
SS
ECLK
CTS
MS
O
X
I
X
CO
BZI
BOI
UDI
SD/CDS
SDO
SRST
NVM
DCLK
RST
GND
BIPOLAR OUT
BIPOLAR OUT
CTS
LOAD
LOAD QHCKSI
‘165
LOAD QHCK
‘165
BQHA
‘164
BCKA
‘164
CK
DATA IN
‘273
DATA IN
‘273
CP
RESET
BIPOLAR IN
BIPOLAR
IN
FIGURE 7. MANCHESTER ENCODER UART
PARALLEL DATA OUT
PARALLEL DATA IN
HD-6409HD-6409
8
FN2951.4
October 1, 2015
Common Electrical Specifications Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
Absolute Maximum Ratings Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.5V to V
CC
+0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Voltage Range. . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . 50ns Max
Sync. Transition Span (t2) . . . . . . . . . .1.5 DBP Typical, (Notes 1, 2)
Short Data Transition Span (t4) . . . . . . 0.5DBP Typical, (Notes 1, 2)
Long Data Transition Span (t5) . . . . . . 1.0DBP Typical, (Notes 1, 2)
Zero Crossing Tolerance (tCD5) . . . . . . . . . . . . . . . . . . . . . (Note 3)
Thermal Resistance (Typical, Note 4)
JA
(°C/W)
JC
(°C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 75 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Maximum Junction Temperature
Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250 Gates
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. DBP-Data Bit Period, Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X, one DBP = 32 Clock Cycles.
2. The input conditions specified are nominal values, the actual input waveforms transition spans may vary by 2 I
X
clock cycles (16X mode) or 6
I
X
clock cycles (32X mode).
3. The maximum zero crossing tolerance is 2 I
X
clock cycles (16X mode) or 6 I
X
clock cycles (32 mode) from the nominal.
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
DC Electrical Specifications V
CC
= 5.0V10%, T
A
= -40°C to +85°C (HD-6409-9).
SYMBOL PARAMETER
TEST CONDITIONS
(Note 5) MIN MAX UNITS
V
IH
Logical “1” Input Voltage V
CC
= 4.5V 70% V
CC
-V
V
IL
Logical “0” Input Voltage V
CC
= 4.5V - 20% V
CC
V
V
IHR
Logic “1” Input Voltage (Reset)V
CC
= 5.5V V
CC
-0.5 - V
V
ILR
Logic “0” Input Voltage (Reset)V
CC
= 4.5V - GND +0.5 V
V
IHC
Logical “1” Input Voltage (Clock) V
CC
= 5.5V V
CC
-0.5 - V
V
ILC
Logical “0” Input Voltage (Clock) V
CC
= 4.5V - GND +0.5 V
I
I
Input Leakage Current (Except I
X
)V
IN
= V
CC
or GND, V
CC
= 5.5V -1.0 +1.0 A
I
I
Input Leakage Current (I
X
)V
IN
= V
CC
or GND, V
CC
= 5.5V -20 +20 A
I
O
I/O Leakage Current V
OUT
= V
CC
or GND, V
CC
= 5.5V -10 +10 A
V
OH
Output HIGH Voltage (All Except O
X
)I
OH
= -2.0mA, V
CC
= 4.5V (Note 6) V
CC
-0.4 - V
V
OL
Output LOW Voltage (All Except O
X
)I
OL
= +2.0mA, V
CC
= 4.5V (Note 6) - 0.4 V
I
CCSB
Standby Power Supply Current V
IN
= V
CC
or GND, V
CC
= 5.5V,
Outputs Open
- 100 A
I
CCOP
Operating Power Supply Current f = 16.0MHz, V
IN
= V
CC
or GND
V
CC
= 5.5V, C
L
= 50pF
- 18.0 mA
F
T
Functional Test (Note 5) - - -
NOTES:
5. Tested as follows: f = 16MHz, V
IH
= 70% V
CC
, V
IL
= 20% V
CC
, V
OH
V
CC
/2, and V
OL
 V
CC
/2, V
CC
= 4.5V and 5.5V.
6. Interchanging of force and sense conditions is permitted
HD-6409HD-6409
9
FN2951.4
October 1, 2015
Capacitance T
A
= +25°C, Frequency = 1MHz.
SYMBOL PARAMETER TEST CONDITIONS TYP UNITS
C
IN
Input Capacitance All measurements are referenced to device GND 10pF
C
OUT
Output Capacitance 12 pF
AC Electrical Specifications V
CC
= 5.0V 10%, T
A
= -40°C to +85°C (HD-6409-9).
SYMBOL PARAMETER
TEST CONDITIONS
(Note 7) MIN MAX UNITS
f
C
Clock Frequency - - 16 MHz
t
C
Clock Period - 1/f
C
-sec
t
1
Bipolar Pulse Width - t
C
+10 - ns
t
3
One-Zero Overlap - - t
C
-10 ns
t
CH
Clock High Time f = 16.0MHz 20 - ns
t
CL
Clock Low Time f = 16.0MHz 20 - ns
t
CE1
Serial Data Setup Time - 120 - ns
t
CE2
Serial Data Hold Time - 0 - ns
t
CD2
DCLK to SDO, NVM - - 40 ns
t
R2
ECLK to BZO - - 40 ns
t
r
Output Rise Time (All except Clock) From 1.0V to 3.5V, C
L
= 50pF, Note 8 - 50 ns
t
f
Output Fall Time (All except Clock) From 3.5V to 1.0V, C
L
= 50pF, Note 8 - 50 ns
t
r
Clock Output Rise Time From 1.0V to 3.5V, C
L
= 20pF, Note 8 - 11 ns
t
f
Clock Output Fall Time From 3.5V to 1.0V, C
L
= 20pF, Note 8 - 11 ns
t
CE3
ECLK to BZO, BOO Notes 8, 9 0.5 1.0 DBP
t
CE4
CTS Low to BZO, BOO Enabled Notes 8, 9 0.5 1.5 DBP
t
CE5
CTS Low to ECLK Enabled Notes 8, 9 10.5 11.5 DBP
t
CE6
CTS High to ECLK Disabled Notes 8, 9 - 1.0 DBP
t
CE7
CTS High to BZO, BOO Disabled Notes 8, 9 1.5 2.5 DBP
t
CD1
UDI to SDO, NVM Notes 8, 9 2.5 3.0 DBP
t
CD3
RST Low to CDLK, SDO, NVM Low Notes 8, 9 0.5 1.5 DBP
t
CD4
RST High to DCLK, Enabled Notes 8, 9 0.5 1.5 DBP
t
R1
UDI to BZO, BOO Notes 8, 9 0.5 1.0 DBP
t
R3
UDI to SDO, NVM Notes 8, 9 2.5 3.0 DBP
NOTES:
7. AC testing as follows: f = 4.0MHz, V
IH
= 70% V
CC
, V
IL
= 20% V
CC
, Speed Select = 16X, V
OH
V
CC
/2, V
OL
 V
CC
/2, V
CC
= 4.5V and 5.5V.
Input rise and fall times driven at 1ns/V, Output load = 50pF.
8. Limits established by characterization and are not production tested.
9. DBP-Data Bit Period, Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X, one DBP = 32 Clock Cycles.
HD-6409HD-6409

HD9P6409-9Z

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Encoders, Decoders, Multiplexers & Demultiplexers W/ANNEAL ENC/DEC 1MHZ 20 -40+85C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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