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9LRS4103BKLFT

P1-P3P4-P6P7-P9P10-P12P13-P15
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
4
Absolute Maximum Ratings
PARAMETER
CONDITIONS
MIN
MAX
UNITS
Notes
Maximum Supply Voltage VDDxxx Core/Logic Supply 4.6 V 1,7
Maximum Supply Voltage VDDxxx_IO Low Voltage Differential I/O Supply 3.8 V 1,7
Maximum Input Voltage
V
IH
3.3V LVTTL Inputs 4.6 V 1,7,8
Minimum Input Voltage V
IL
Any Input GND - 0.5 V 1,7
Storage Temperature Ts - -65 150
°
C
1,7
Case Temperature Tcase - 115
°
C
1,7
Input ESD protection ESD prot Human Body Model 2000 V 1,7
Electrical Characteristics - Input/Supply/Common Output Parameters
PARAMETER
CONDITIONS
MIN
MAX
UNITS
Notes
Ambient Operating Temp Tambient - 0 70 °C 1
Supply Voltage VDDxxx Supply Voltage 3.135 3.465 V 1
Input High Voltage V
IHSE
Single-ended inputs 2
V
DD
+
0.3
V 1
Input Low Voltage V
ILSE
Single-ended inputs V
SS
- 0.3 0.8 V 1
Input Leakage Current I
IN
V
IN
= V
DD ,
V
IN
=
GND -5 5 uA 1
Input Leakage Current I
INRES
Inputs with pull or pull down resistors
V
IN
= V
DD ,
V
IN
=
GND
-200 200 uA 1
Output High Voltage V
OHSE
Single-ended outputs, I
OH
= -1mA 2.4 V 1
Output Low Voltage V
OLSE
Single-ended outputs, I
OL
= 1 mA 0.4 V 1
Output High Voltage V
OHDIF
Differential Outputs 0.7 0.9 V 1
Output Low Voltage V
OLDIF
Differential Outputs 0.4 V 1
Low Threshold Input-
High Voltage
V
IH_FS
3.3 V +/-5% 0.7
VDD +
0.3
V 1
Low Threshold Input-
Low Voltage
V
IL_FS
3.3 V +/-5% V
SS
- 0.3 0.35 V 1
Operating Supply Current I
DD
3.3V supply 100 mA 1
Power Down Current I
DD_PD3.3
3.3V supply, Power Down Mode 6 mA 1
iAMT Mode Current I
DD_iAMT3.3
3.3V supply, iAMT Mode 50 mA 1
Input Frequency F
i
V
DD
= 3.3 V 14.3182 MHz 2
Pin Inductance L
pin
7 nH 1
C
IN
Logic Inputs 1.5 5 pF 1
C
OUT
Output pin capacitance 6 pF 1
C
INX
X1 & X2 pins 6 pF 1
Spread Spectrum
Modulation Frequency
f
SSMOD
Triangular Modulation 30 33 kHz 1
Input Capacitance
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
5
AC Electrical Characteristics - Input/Common Parameters
PARAMETER
CONDITIONS
MIN
MAX
UNITS
Notes
Clk Stabilization TSTAB
From VDD Power-Up or de-assertion of
PD# to 1st clock
1.8 ms 1
Tfall_PD#
TFALL
5
ns
1
Trise_PD# TRISE 5 ns 1
Fall/rise time of PD#, PCI_STOP# and
CPU_STOP# inputs
AC Electrical Characteristics - Low Power Differential Outputs
PARAMETER
CONDITIONS
MIN
MAX
UNITS
NOTES
Rising Edge Slew Rate tSLR Differential Measurement 2.5 4 V/ns 1,2
Falling Edge Slew Rate tFLR Differential Measurement 2.5 4 V/ns 1,2
Slew Rate Variation tSLVAR Single-ended Measurement 20 % 1
Maximum Output Voltage
VHIGH
Includes overshoot
1150
mV
1
Minimum Output Voltage VLOW Includes undershoot -300 mV 1
Differential Voltage Swing VSWING Differential Measurement 300 mV 1
Crossing Point Voltage VXABS Single-ended Measurement 300 550 mV 1,3,4
Crossing Point Variation VXABSVAR Single-ended Measurement 140 mV 1,3,5
Duty Cycle DCYC Differential Measurement 45 55 % 1
CPU Jitter - Cycle to
Cycle
CPUJC2C Differential Measurement 85 ps 1
SRC Jitter - Cycle to
Cycle
SRCJC2C Differential Measurement 125 ps 1
DOT Jitter - Cycle to
Cycle
DOTJC2C Differential Measurement 250 ps 1
SRC Skew SRCSKEW
Differential Measurement, all SRC from
same PLL
200 ps 1
Electrical Characteristics - REF-14.318MHz
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
Long Accuracy
ppm
see Tperiod min-max values
0
0
ppm
1,6
Clock period Tperiod 14.318180 MHz output nominal 69.8413 69.8413 ns 6
Absolute min/max period Tabs
14.318180 MHz including cycle to cycle
jitter
68.8413 70.84128 ns 6
Output High Voltage
VOH
IOH = -1 mA
2.4
V
1
Output Low Voltage
VOL
IOL = 1 mA
0.4
V
1
Output High Current IOH
VOH @MIN = 1.0 V,
VOH@MAX = 3.135 V
-33 -33 mA 1
Output Low Current IOL
VOL @MIN = 1.95 V,
VOL @MAX = 0.4 V
30 38 mA 1
Rising Edge Slew Rate tSLR Measured from 0.8 to 2.0 V 1 4 V/ns 1
Falling Edge Slew Rate tFLR Measured from 2.0 to 0.8 V 1 4 V/ns 1
Duty Cycle dt1 VT = 1.5 V 45 55 % 1
Jitter tjcyc-cyc VT = 1.5 V 1000 ps 1
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
6
Electrical Characteristics - SMBus Interface
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
SMBus Voltage V
DD
2.7 5.5 V 1
Low-level Output Voltage V
OLSMB
@ I
PULLUP
0.4 V 1
Current sinking at
V
OLSMB
= 0.4 V
I
PULLUP
SMB Data Pin 4 mA 1
SCLK/SDATA
Clock/Data Rise Time
T
RI2C
(Max VIL - 0.15) to
(Min VIH + 0.15)
1000 ns 1
SCLK/SDATA
Clock/Data Fall Time
T
FI2C
(Min VIH + 0.15) to
(Max VIL - 0.15)
300 ns 1
Maximum SMBus
Operating Frequency
F
SMBUS
Block Mode 100 kHz 1
Notes on Electrical Characteristics:
1
Guaranteed by design and characterization, not 100% tested in production.
2
Slew rate measured through Vswing centered around differential zero
3
Vxabs is defined as the voltage where CLK = CLK#
4
Only applies to the differential rising edge (CLK rising and CLK# falling)
6
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF has been tuned to exactly 14.318180 MHz
8
Maximum input voltage is not to exceed maximum VDD
5
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of CLK and falling edge of
CLK#. It is measured using a +/-75mV window centered on the average cross point where CLK meets CLK#. The average cross point is used to
calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations.
7
Operation under these conditions is neither implied, nor guaranteed.
P1-P3P4-P6P7-P9P10-P12P13-P15

9LRS4103BKLFT

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Buy 9LRS4103BKLFT
Manufacturer:
IDT
Description:
Clock Generators & Support Products PC MAIN CLOCK - PIKETON
Lifecycle:
New from this manufacturer.
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