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9LRS4103BKLFT

P1-P3P4-P6P7-P9P10-P12P13-P15
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
7
CPU SRC DOT96 CK_SSC_DISP
100 100 100 100
ppm
50 125 250 125
ps
-0.50% -0.50% 0 -0.50% %
Clock Periods - Differential Outputs with Spread Spectrum Disabled
1 Clock 1us 0.1s 0.1s 0.1s 1us 1 Clock
-c2c jitter
AbsPer
Min
-SSC
Short-Term
Average
Min
- ppm
Long-Term
Average
Min
0 ppm Period
Nominal
Long-Term
Average
Max
+SSC
Short-Term
Average
Max
+c2c jitter
AbsPer
Max
100.00 9.94900 9.99900 10.00000 10.00100 10.05100 ns 1,2
133.33 7.44925 7.49925 7.50000 7.50075 7.55075 ns 1,2
SRC 100.00 9.87400 9.99900 10.00000 10.00100 10.12600 ns 1,2
CK_SSC_DISP 120.00 8.20750 8.33250 8.33333 8.33417 8.45917 ns 1,2
DOT96 96.00 10.16563 10.41563 10.41667 10.41771 10.66771 ns 1,2
Clock Periods - Differential Outputs with Spread Spectrum Enabled
1 Clock 1us 0.1s 0.1s 0.1s 1us 1 Clock
-c2c jitter
AbsPer
Min
-SSC
Short-Term
Average
Min
- ppm
Long-Term
Average
Min
0 ppm Period
Nominal
Long-Term
Average
Max
+SSC
Short-Term
Average
Max
+c2c jitter
AbsPer
Max
99.75 9.94906 9.99906 10.02406 10.02506 10.02607 10.05107 10.10107 ns 1,2
133.00 7.44930 7.49930 7.51805 7.51880 7.51955 7.53830 7.58830 ns 1,2
SRC 99.75 9.87406 9.99906 10.02406 10.02506 10.02607 10.05107 10.17607 ns 1,2
CK_SSC_DISP 119.70 8.20755 8.33255 8.35338 8.35422 8.35505 8.37589 8.50089 ns 1,2
1
Guaranteed by design and characterization, not 100% tested in production.
Notes
Differential Clock Tolerances
2
All Long Term Accuracy specifications are guaranteed with the assumption that the crystal input is tuned to exactly 14.31818MHz.
Measurement Window
UnitsSSC ON
Center
Freq.
MHz
Notes
PPM tolerance
Cycle to Cycle Jitter
CPU
Measurement Window
Units
Spread
SSC OFF
Center
Freq.
MHz
CPU
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
8
Table 1: CPU Frequency Select Table
FS
L
C
B0b7
CPU
MHz
SRC
MHz
REF
MHz
DOT
MHz
0 (Default) 133.33
1 100.00
1. FS
L
C is a low-threshold input.Please see V
IL_FS
and V
IH_FS
specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
100.00 14.318 96.00
Table 2: IO_Vout select table
B9b2 B9b1 B9b0
IO_
Vout
0 0 0 0.3V
0 0 1 0.4V
0 1 0 0.5V
0 1 1 0.6V
1 0 0 0.7V
1 0 1 0.8V
1 1 0 0.9V
1 1 1 1.0V
Table 3: Device ID table
Comment
0 0 0 0
56 pin TSSOP
0 0 0 1
64 pin TSSOP
0 0 1 0 Reserved
0 0 1 1 Reserved
0 1 0 0 Reserved
0 1 0 1 72 pin QFN
0 1 1 0 Reserved
0 1 1 1 Reserved
1 0 0 0 32 pin QFN
1 0 0 1 Reserved
1 0 1 0 Reserved
1 0 1 1 Reserved
1 1 0 0 Reserved
1 1 0 1 Reserved
1 1 1 0 Reserved
1 1 1 1 Reserved
B8b7 B8b6 B8b5 B8b4
Table 4: Series Resistors for REF Output
Number of Loads
to Drive
REF
Strength
Rs
1 1x 33
Ω
[39
Ω
]
1 2x 39
Ω
[43
Ω
]
2 2x 27
Ω
[33
Ω
]
Notes:
2. Desktop/Mobile Platforms with Zo = 50/55 ohms use the first resistor value.
3. Systems with Zo = 60 ohms use the resistor values in brackets [ ].
1. Preferred drive strengths using CK505 clock sources. Transmission
D.C.Drive
Strength
IDT
®
PC MAIN CLOCK 1520A—03/16/10
ICS9LRS4103
PC MAIN CLOCK
9
PD# Power Management
Device State
w/o Latched input
w/Latched input
Latches Open
Power Down
M1
Virtual Power Cycle to
Latches Open
Single-ended Clocks
Differential Clocks
Low Hi-Z
CK= Pull down, CK#
= Low
CK= Pull down, CK#
= Low
CK= Pull down, CK#
= Low
CPU0
CK= Pull down, CK#
= Low
CK= Pull down
CK# = Low
CK= Pull down
CK# = Low
CK= Pull down
CK# = Low
Running
P1-P3P4-P6P7-P9P10-P12P13-P15

9LRS4103BKLFT

Mfr. #:
Buy 9LRS4103BKLFT
Manufacturer:
IDT
Description:
Clock Generators & Support Products PC MAIN CLOCK - PIKETON
Lifecycle:
New from this manufacturer.
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