OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

AT45DB021B-SU

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
16
1937J–DFLSH–9/05
AT45DB021B
9.3 Reset Timing (Inactive Clock Polarity Low Shown)
Note: The CS signal should be in the high state before the RESET signal is deasserted.
9.4 Command Sequence for Read/Write Operations (except Status Register Read)
Notes: 1. “r” designates bits reserved for larger densities.
2. It is recommended that “r” be a logical “0” for densities of 2M bits or smaller.
3. For densities larger than 2M bits, the “r” bits become the most significant Page Address bit for the appropriate density.
CS
SCK
RESET
SO
HIGH IMPEDANCE HIGH IMPEDANCE
SI
t
RST
t
REC
t
CSS
SI CMD 8 bits
8 bits
8 bits
MSB
Reserved for
larger densities
Page Address
(PA9-PA0)
Byte/Buffer Address
(BA8-BA0/BFA8-BFA0)
LSBr r r r r X X X X X X X X X X X X X X X X X X X
17
1937J–DFLSH–9/05
AT45DB021B
10. Write Operations
The following block diagram and waveforms illustrate the various write sequences available.
10.1 Main Memory Page Program through Buffers
10.2 Buffer Write
10.3 Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page)
FLASH MEMORY ARRAY
PAGE (256 BYTES)
BUFFER 2 (256 BYTES)BUFFER 1 (256 BYTES)
I/O INTERFACE
SI
BUFFER 1 TO
PAGE PROGRAM
PAGE PROGRAM
THROUGH BUFFER 2
BUFFER 2 TO
PAGE PROGRAM
PAGE PROGRAM
THROUGH BUFFER 1
BUFFER 1
WRITE
BUFFER 2
WRITE
SI
CMD n n+1 Last Byte
· Completes writing into selected buffer
· Starts self-timed erase/program operation
CS
rrrr r, PA9-7
PA6-0, BFA8 BFA7-0
SI
CMD X
X···X, BFA8
BFA7-0
n
n+1
Last Byte
· Completes writing into selected buffer
CS
SI
CMD rrrr r, PA9-7 PA6-0, X
CS
Starts self-timed erase/program operation
X
Each transition represents
8 bits and 8 clock c
y
cles
n = 1st byte read
n+1 = 2nd byte read
18
1937J–DFLSH–9/05
AT45DB021B
11. Read Operations
The following block diagram and waveforms illustrate the various read sequences available.
11.1 Main Memory Page Read
11.2 Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer)
11.3 Buffer Read
FLASH MEMORY ARRAY
PAGE (264 BYTES)
BUFFER 2 (264 BYTES)BUFFER 1 (264 BYTES)
I/O INTERFACE
MAIN MEMORY
PAGE TO
BUFFER 1
MAIN MEMORY
PAGE TO
BUFFER 2
MAIN MEMORY
PAGE READ
BUFFER 1
READ
BUFFER 2
READ
SO
SI
CMD
rrrr r, PA9-7
PA6-0, BA8
BA7-0 X
XXX
CS
n n+1
SO
SI
CMD
rrrr r, PA9-7
PA6-0, X X
Starts reading page data into buffer
CS
SO
SI
CMD
X
X···X, BFA8
BFA7-0
CS
n n+1
SO
X
Each transition represents
8 bits and 8 clock c
y
cles
n = 1st byte read
n+1 = 2nd byte read
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

AT45DB021B-SU

Mfr. #:
Buy AT45DB021B-SU
Manufacturer:
Description:
IC FLASH 2M SPI 20MHZ 8SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet