CY28409
Document #: 38-07445 Rev. *D Page 13 of 17
CPU at 0.7V
T
DC
CPUT and CPUC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100-MHz CPUT and CPUC Period Measured at crossing point V
OX
9.9970 10.003 ns
T
PERIOD
133-MHz CPUT and CPUC Period Measured at crossing point V
OX
7.4978 7.5023 ns
T
PERIOD
200-MHz CPUT and CPUC Period Measured at crossing point V
OX
4.9985 5.0015 ns
T
SKEW
Any CPUT/C to CPUT/C Clock Skew Measured at crossing point V
OX
–100ps
T
CCJ
CPUT/C Cycle to Cycle Jitter Measured at crossing point V
OX
–125ps
T
R
/ T
F
CPUT and CPUC Rise and Fall Times Measured from V
OL
= 0.175 to V
OH
= 0.525V 175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of 2*(T
R
– T
F
)/(T
R
+ T
F
)– 20 %
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 11 660 850 mV
V
LOW
Voltage Low Math averages Figure 11 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+ 0.3 V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 11. Measure SE 0.2 V
SRC
T
DC
SRCT and SRCC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100 MHz SRCT and SRCC Period Measured at crossing point V
OX
9.9970 10.003 ns
T
PERIOD
200 MHz SRCT and SRCC Period Measured at crossing point V
OX
4.9985 5.0015 ns
T
CCJ
SRCT/C Cycle to Cycle Jitter Measured at crossing point V
OX
–125ps
L
ACC
SRCT/C Long Term Accuracy Measured at crossing point V
OX
300 ppm
T
R
/ T
F
SRCT and SRCC Rise and Fall Times Measured from V
OL
= 0.175 to V
OH
= 0.525V 175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of 2*(T
R
– T
F
)/(T
R
+ T
F
)– 20 %
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 11 660 850 mV
V
LOW
Voltage Low Math averages Figure 11 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+ 0.3 V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 11. Measure SE 0.2 V
3V66
T
DC
3V66 Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled 3V66 Period Measurement at 1.5V 14.9955 15.0045 ns
T
PERIOD
Spread Enabled 3V66 Period Measurement at 1.5V 14.9955 15.0799 ns
T
HIGH
3V66 High Time Measurement at 2.0V 4.9500 ns
T
LOW
3V66 Low Time Measurement at 0.8V 4.5500 ns
T
R
/ T
F
3V66 Rise and Fall Times Measured between 0.8V and 2.0V 0.5 2.0 ns
T
SKEW
Any 3V66 to Any 3V66 Clock Skew Measurement at 1.5V 250 ps
T
CCJ
3V66 Cycle to Cycle Jitter Measurement at 1.5V 250 ps
PCI/PCIF
T
DC
PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.0009 ns
T
PERIOD
Spread Enabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.1598 ns
T
HIGH
PCIF and PCI high time Measurement at 2.0V 12.0 ns
T
LOW
PCIF and PCI low time Measurement at 0.8V 12.0 ns
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
CY28409
Document #: 38-07445 Rev. *D Page 14 of 17
T
R
/ T
F
PCIF and PCI rise and fall times Measured between 0.8V and 2.0V 0.5 2.0 ns
T
SKEW
Any PCI clock to Any PCI clock Skew Measurement at 1.5V 500 ps
T
CCJ
PCIF and PCI Cycle to Cycle Jitter Measurement at 1.5V 250 ps
DOT
T
DC
Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Period Measurement at 1.5V 20.8271 20.8396 ns
T
SKEW
Any 48-MHz to 48-MHz Clock Skew Measured at crossing point V
OX
–500ps
T
HIGH
USB high time Measurement at 2.0V 8.994 10.486 ns
T
LOW
USB low time Measurement at 0.8V 8.794 10.386 ns
T
R
/ T
F
Rise and Fall Times Measured between 0.8V and 2.0V 0.5 1.0 ns
T
CCJ
Cycle to Cycle Jitter Measurement at 1.5V 350 ps
USB
T
DC
Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Period Measurement at 1.5V 20.8271 20.8396 ns
T
SKEW
Any 48-MHz to 48-MHz Clock Skew Measured at crossing point V
OX
–500ps
T
HIGH
USB high time Measurement at 2.0V 8.094 10.036 ns
T
LOW
USB low time Measurement at 0.8V 7.694 9.836 ns
T
R
/ T
F
Rise and Fall Times Measured between 0.8V and 2.0V 1.0 2.0 ns
T
CCJ
Cycle to Cycle Jitter Measurement at 1.5V 350 ps
REF
T
DC
REF Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
REF Period Measurement at 1.5V 69.827 69.855 ns
T
SKEW
Any REF to REF Clock Skew Measured at crossing point V
OX
–500ps
T
R
/ T
F
REF Rise and Fall Times Measured between 0.8V and 2.0V 0.5 2.0 ns
T
CCJ
REF Cycle to Cycle Jitter Measurement at 1.5V 1000 ps
ENABLE/DISABLE and SET-UP
T
STABLE
Clock Stabilization from Power-up 1.8 ms
T
SS
Stopclock Set-up Time 10.0 ns
T
SH
Stopclock Hold Time 0 ns
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
Table 7. Group Timing Relationship and Tolerances
Group Conditions
Offset
Min. Max.
3V66 to PCI 3V66 Leads PCI 1.5 ns 3.5 ns
Table 8. USB to DOT Phase Offset
Parameter Typical Value Tolerance
DOT Skew 0.0 ns 1000 ps
USB Skew 180° 0.0 ns 1000 ps
VCH SKew 0.0 ns 1000 ps
Table 9. Maximum Lumped Capacitive Output Loads
Clock Max Load Unit
PCI Clocks 30 pF
3V66 Clocks 30 pF
USB Clock 20 pF
DOT Clock 10 pF
REF Clock 30 pF
CY28409
Document #: 38-07445 Rev. *D Page 15 of 17
Test and Measurement Set-up
For Differential CPU and SRC Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
CPUT
T
PCB
T
PCB
CPUC
33
33
49.9
49.9
Measurement
Point
2 pF
475
IREF
Measurement
Point
2 pF
Figure 11. 0.7V Load Configuration
2.0V
0.8V
3.3V
0V
Tr
Tf
1.5V
3.3V signals
tDC
Probe
Output under Test
Load Cap
-
-
Figure 12. Lumped Load For Single-ended Output Signals (for AC Parameters Measurement)
Table 10.CPU Clock Current Select Function
Board Target Trace/Term Z Reference R, I
REF
– V
DD
(3*R
REF
) Output Current Voh @ Z
50 Ohms R
REF
= 475 1%, I
REF
= 2.32 mA I
OH
= 6*I
REF
0.7V @ 50
Ordering Information
Part Number Package Type Product Flow
CY28409OC 56-pin SSOP Commercial, 0° to 70°C
CY28409OCT 56-pin SSOP – Tape and Reel Commercial, 0° to 70°C
CY28409ZC 56-pin TSSOP Commercial, 0° to 70°C
CY28409ZCT 56-pin TSSOP – Tape and Reel Commercial, 0° to 70°C
PB-Free
CY28409OXC 56-pin SSOP Commercial, 0° to 70°C
CY28409OCXT 56-pin SSOP – Tape and Reel Commercial, 0° to 70°C
CY28409ZXC 56-pin TSSOP Commercial, 0° to 70°C
CY28409ZXCT 56-pin TSSOP – Tape and Reel Commercial, 0° to 70°C

CY28409ZXCT

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Synthesizer / Jitter Cleaner System Clock for Intel Grantsdale, 865 and 875 chipsets (CK409)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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