LTC1857/LTC1858/LTC1859
10
185789fb
For more information www.linear.com/LTC1857
OPERATION
OVERVIEW
The LTC1857/LTC1858/LTC1859 are innovative, multichan
-
nel ADCs that provide software-selectable input ranges for
each of their eight input channels. Using on-chip resistors
and switches, it provides an attenuation and offset that can
be programmed for each channel on the fly. The precisely
trimmed attenuators ensure accurate input ranges. Because
they precede the multiplexer, errors due to multiplexer
on-resistance are eliminated.
The input word that selects the input channel also selects the
desired input range for that channel. The available ranges
are 0V to 5V, 0V to 10V (unipolar), ±5V and ±10V (bipolar).
They are achieved with the ADC running on a single 5V
supply. In addition to the range selection, single-ended
or differential inputs may be selected for each channel or
pair of channels. Finally, overrange protection is provided
for unselected channels. An overrange condition on an
unused channel will not affect the conversion result on
the selected channel.
CONVERSION DETAILS
The LTC1857/LTC1858/LTC1859 use a successive ap
-
proximation algorithm and an internal sample-and-hold
circuit to convert an analog signal to a 12-/14-/16-bit serial
output respectively. The ADCs are complete with a precision
reference and an internal clock. The control logic provides
easy interface to microprocessors and DSPs. (Please refer
to the Digital Interface section for the data format.)
The analog signals applied at the MUX input channels are
rescaled by the resistor divider network formed by R1, R2
and R3 as shown below. The rescaled signals appear on
the MUXOUT (Pins 10, 11) which are also connected to
the ADC inputs (Pins 12, 13) under normal operation.
Before starting a conversion, an 8-bit data word is clocked
into the SDI input on the first eight rising SCK edges to
select the MUX address, input range and power down
mode. The ADC enters acquisition mode on the falling
edge of the sixth clock in the 8-bit data word and ends
on the rising edge of the CONVST signal which also starts
a conversion (see Figure 7). A minimum time of 4µs will
provide enough time for the sample-and-hold capacitors
to acquire the analog signal. Once a conversion cycle has
begun, it cannot be restarted.
During the conversion, the internal differential 12-/14-
/16-bit capacitive DAC output is sequenced by the SAR from
the most significant bit (MSB) to the least significant bit
(LSB). The input is successively compared with the binary
weighted charges supplied by the differential capacitive
DAC. Bit decisions are made by a high speed comparator.
At the end of a conversion, the DAC output balances the
analog input (ADC
+
– ADC
–
). The SAR contents (a 16-bit
data word) which represents the difference of ADC
+
and
ADC
–
are loaded into the 12-/14-/16-bit shift register.
DRIVING THE ANALOG INPUTS
The nominal input ranges for the LTC1857/LTC1858/
LTC1859 are 0V to 5V, 0V to 10V, ±5V and ±10V and the
MUX inputs are overvoltage protected to ± 25V. The input
impedance is typically 42kΩ in unipolar mode and 31kΩ
in bipolar mode, therefore, it should be driven with a low
impedance source. Wideband noise coupling into the input
can be minimized by placing a 3000pF capacitor at the input
as shown in Figure 2. An NPO-type capacitor gives the
lowest distortion. Place the capacitor as close to the device
input pin as possible. If an amplifier is to be used to drive
the input, care should be taken to select an amplifier with
adequate accuracy, linearity and noise for the application.
The following list is a summary of the op amps that are
suitable for driving the LTC1857/LTC1858/LTC1859. More
detailed information is available in the Linear Technology
data books and online at www.linear.com.
LT
®
1007: Low noise precision amplifier. 2.7mA supply
current ±5V to ±15V supplies. Gain bandwidth product
8MHz. DC applications.
MUX
INPUT
R1
25k
CH SEL
R3
10k
1859 AI03
R2
17k
MUXOUT
BIPOLAR
