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AD1836AASZRL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
Data Sheet AD1836A
Rev. A | Page 21 of 24
Table 19. ADC Control Register 3
When changing clock mode, other SPI bits that are written during the same SPI transaction may be lost. Therefore, it is recommended
that these be set separately.
Address
RD/WR
Reserved
Clock Mode
Function
Left Differential
I/P Select
Right
Differential
I/P Select
Left
MUX/PGA
Enable
Left MUX
I/P Select
Right
MUX/PGA
Enable
Right
MUX I/P
Select
15, 14,
13, 12
11 10, 9, 8 7, 6 5 4 3 2 1 0
1110 0 000 00 = 256 × f
S
01 = 512 × f
S
10 = 768 × f
S
0 = Differential
PGA Mode
1 = PGA/MUX
Mode (Single-
Ended Input)
0 = Differential
PGA Mode
1 = PGA/MUX
Mode (Single-
Ended Input)
0 = Direct
1 = MUX/PGA
0 = I/P 0
1 = I/P 1
0 = Direct
1 = MUX/PGA
0 = I/P 0
1 = I/P 1
Table 20. ADC Peak Level Data Registers
Address
RD/WR
Reserved
Peak Level Data (10 Bits)
6 Data Bits 4 Fixed Bits
15, 14, 13, 12 11 10 9:4 3:0
1000 = ADC1L
1001 = ADC1R
1010 = ADC2L
1011 = ADC2R
1 0 000000 = 0.0 dBFS
000001 = –1.0 dBFS
000010 = –2.0 dBFS
000011 = –3.0 dBFS
111100 = –60 dBFS Min
0000
The 4 LSBs are always zero.
AD1836A Data Sheet
Rev. A | Page 22 of 24
AD1836A
ADC2L
C1
1nF
C2
1nF
LEFT
INPUT NO. 1
LEFT
INPUT NO. 2
CAP1L
INPUT SELECT
250Ω
PGA
–
+
–
+
V
REF
250Ω
MUX
CAP2L
GAIN SELECT
POWER-DOWN
NOTE
ADC2 SINGLE-ENDED MUX PGA INPUT MODE––LEFT CHANNEL ONLY SHOWN.
CONTROL REGISTER 3 CONTENTS: 6 LSBs: SELECT INPUT NO. 1: 11 1010
SELECT INPUT NO. 2: 11 1111
V
REF
Figure 13. Single-Ended MUX/PGA Mode
AD1836A
ADC2L
C1
1nF
C2
1nF
LEFT + VE
INPUT
LEFT – VE
INPUT
CAP1L
–
+
–
+
V
REF
PGA
GAIN SELECT
250Ω
250Ω
CAP2L
NOTE
ADC2 DIFFERENTIAL PGA INPUT MODE—LEFT CHANNEL ONLY SHOWN.
CONTROL REGISTER 3 CONTENTS: 6 LSBs: 00 1010
POWER-DOWN
Figure 14. Differential PGA Mode
Data Sheet AD1836A
Rev. A | Page 23 of 24
OUTLINE DIMENSIONS
SEATING
PLANE
VIEW A
2.45
MAX
1.03
0.88
0.73
TOP VIEW
(PINS DOWN)
1
39
40
13
14
27
26
52
PIN 1
13.45
13.20 SQ
12.95
7.80
REF
10.20
10.00 SQ
9.80
0.40
0.22
0.25
0.10
2.20
2.00
1.80
7°
0°
0.10
COPLANARITY
VIEW A
ROTATED 90° CCW
10°
6°
2°
0.23
0.11
0.65 BSC
LEAD PITCH
LEAD WIDTH
COMPLIANT TO JEDEC STANDARDS MS-022-AC.
Figure 15. 52-Lead Plastic Quad Flat Package [MQFP]
(S-52-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Package
Package Description
Package Option
AD1836AASZ
–40°C to +85°C
52-Lead MQFP
S-52-1
AD1836AASZRL –40°C to +85°C 52-Lead MQFP, 13" Tape and Reel S-52-1
AD1836ACSZ –40°C to +85°C 52-Lead MQFP S-52-1
1
Z = RoHS Compliant Part.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

AD1836AASZRL

Mfr. #:
Buy AD1836AASZRL
Manufacturer:
Analog Devices Inc.
Description:
Interface - CODECs IC MultiCH96 kHz Codec
Lifecycle:
New from this manufacturer.
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