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MAX1631EAI+

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
______________________________________________________________________________________ 19
Current-Sense Resistor Value
The current-sense resistor value is calculated according
to the worst-case-low current-limit threshold voltage
(from the Electrical Characteristics table) and the peak
inductor current:
Use I
PEAK
from the second equation in the Inductor
Value section
Use the calculated value of R
SENSE
to size the MOSFET
switches and specify inductor saturation-current ratings
according to the worst-case high-current-limit threshold
voltage:
Low-inductance resistors, such as surface-mount
metal-film, are recommended.
Input Capacitor Value
Connect low-ESR bulk capacitors and small ceramic
capacitors (0.1µF) directly to the drains on the high-
side MOSFETs. The bulk input filter capacitor is usually
selected according to input ripple current requirements
and voltage rating, rather than capacitor value.
Electrolytic capacitors with low enough effective series
resistance (ESR) to meet the ripple current requirement
invariably have sufficient capacitance values.
Aluminum electrolytic capacitors, such as Sanyo
OS-CON or Nichicon PL, are superior to tantalum
types, which carry the risk of power-up surge-current
failure, especially when connecting to robust AC
adapters or low-impedance batteries. RMS input ripple
current (I
RMS
) is determined by the input voltage and
load current, with the worst case occurring at V
IN
= 2 x
V
OUT
:
Bypassing V+
Bypass the V+ input with a 4.7µF tantalum capacitor
paralleled with a 0.1µF ceramic capacitor, close to the
IC. A 10Ω series resistor to V
IN
is also recommended.
Bypassing VL
Bypass the VL output with a 4.7µF tantalum capacitor
paralleled with a 0.1µF ceramic capacitor, close to the
device.
Output Filter Capacitor Value
The output filter capacitor values are generally deter-
mined by the ESR and voltage rating requirements, rather
than actual capacitance requirements for loop stability. In
other words, the low-ESR electrolytic capacitor that meets
the ESR requirement usually has more output capaci-
tance than is required for AC stability. Use only special-
ized low-ESR capacitors intended for switching-regulator
applications, such as AVX TPS, Sprague 595D, Sanyo
OS-CON, or Nichicon PL series. To ensure stability, the
capacitor must meet both minimum capacitance and
maximum ESR values as given in the following equations:
(can be multiplied by 1.5; see text below)
These equations are worst case, with 45 degrees of
phase margin to ensure jitter-free, fixed-frequency
operation and provide a nicely damped output
response for zero to full-load step changes. Some cost-
conscious designers may wish to bend these rules with
less-expensive capacitors, particularly if the load lacks
large step changes. This practice is tolerable if some
bench testing over temperature is done to verify
acceptable noise and transient response.
No well-defined boundary exists between stable and
unstable operation. As phase margin is reduced, the
first symptom is a bit of timing jitter, which shows up as
blurred edges in the switching waveforms where the
scope won’t quite sync up. Technically speaking, this
jitter (usually harmless) is unstable operation, since the
duty factor varies slightly. As capacitors with higher
ESRs are used, the jitter becomes more pronounced,
and the load-transient output voltage waveform starts
looking ragged at the edges. Eventually, the load-tran-
sient waveform has enough ringing on it that the peak
noise levels exceed the allowable output voltage toler-
ance. Note that even with zero phase margin and gross
instability present, the output voltage noise never gets
much worse than I
PEAK
x R
ESR
(under constant loads).
Designers of RF communicators or other noise-sensi-
tive analog equipment should be conservative and stay
within the guidelines. Designers of notebook computers
and similar commercial-temperature-range digital
C>
V (1 + V / V )
V x R x f
<
OUT
REF OUT IN(MIN)
OUT SENSE
R
RxV
V
ESR
SENSE OUT
REF
I = I x
V(V-V)
V
Therefore, when V is 2 x V :
I
I
2
RMS LOAD
OUT IN OUT
IN
IN OUT
RMS
LOAD
=
I =
120mV
R
PEAK(MAX)
SENSE
R =
80mV
I
SENSE
PEAK
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
20 ______________________________________________________________________________________
systems can multiply the R
ESR
value by a factor of 1.5
without hurting stability or transient response.
The output voltage ripple is usually dominated by the
filter capacitor’s ESR, and can be approximated as
I
RIPPLE
x R
ESR
. There is also a capacitive term, so the
full equation for ripple in continuous-conduction mode
is V
NOISE (p-p)
= I
RIPPLE
x [R
ESR
+ 1/(2 x π x f x
C
OUT
)]. In Idle Mode, the inductor current becomes
discontinuous, with high peaks and widely spaced
pulses, so the noise can actually be higher at light load
(compared to full load). In Idle Mode, calculate the out-
put ripple as follows:
Transformer Design
(for Auxiliary Outputs Only)
Buck-plus-flyback applications, sometimes called “cou-
pled-inductor” topologies, need a transformer to gener-
ate multiple output voltages. Performing the basic
electrical design is a simple task of calculating turns
ratios and adding the power delivered to the secondary
to calculate the current-sense resistor and primary
inductance. However, extremes of low input-output dif-
ferentials, widely different output loading levels, and
high turns ratios can complicate the design due to par-
asitic transformer parameters such as interwinding
capacitance, secondary resistance, and leakage
inductance. For examples of what is possible with real-
world transformers, see the Maximum Secondary
Current vs. Input Voltage graph in the Typical
Operating Characteristics section.
Power from the main and secondary outputs is com-
bined to get an equivalent current referred to the main
output voltage (see the Inductor Value section for para-
meter definitions). Set the current-sense resistor resis-
tor value at 80mV / I
TOTAL
.
P
TOTAL
= The sum of the output power from all outputs
I
TOTAL
= P
TOTAL
/ V
OUT
= The equivalent output cur-
rent referred to V
OUT
where: V
SEC
= the minimum required rectified sec-
ondary output voltage
V
FWD
= the forward drop across the secondary
rectifier
V
OUT(MIN)
= the minimum value of the main
output voltage (from the Electrical
Characteristics)
V
RECT
= the on-state voltage drop across the
synchronous rectifier MOSFET
V
SENSE
= the voltage drop across the sense
resistor
In positive-output applications, the transformer sec-
ondary return is often referred to the main output volt-
age, rather than to ground, to reduce the needed turns
ratio. In this case, the main output voltage must first be
subtracted from the secondary voltage to obtain V
SEC
.
Selecting Other Components
MOSFET Switches
The high-current N-channel MOSFETs must be logic-level
types with guaranteed on-resistance specifications at
V
GS
= 4.5V. Lower gate threshold specifications are bet-
ter (i.e., 2V max rather than 3V max). Drain-source break-
down voltage ratings must at least equal the maximum
input voltage, preferably with a 20% derating factor. The
best MOSFETs will have the lowest on-resistance per
nanocoulomb of gate charge. Multiplying R
DS(ON)
x Q
G
provides a good figure for comparing various MOSFETs.
Newer MOSFET process technologies with dense cell
structures generally perform best. The internal gate
drivers tolerate >100nC total gate charge, but 70nC is a
more practical upper limit to maintain best switching
times.
In high-current applications, MOSFET package power
dissipation often becomes a dominant design factor.
I
2
R power losses are the greatest heat contributor for
both high-side and low-side MOSFETs. I
2
R losses are
distributed between Q1 and Q2 according to duty fac-
tor (see the following equations). Generally, switching
losses affect only the upper MOSFET, since the
Schottky rectifier clamps the switching node in most
cases before the synchronous rectifier turns on. Gate-
charge losses are dissipated by the driver and don’t
heat the MOSFET. Calculate the temperature rise
according to package thermal-resistance specifications
to ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature. The
worst-case dissipation for the high-side MOSFET
occurs at both extremes of input voltage, and the
worst-case dissipation for the low-side MOSFET occurs
at maximum input voltage.
L(primary) =
V(V -V)
V x f x I x LIR
Turns Ratio N =
V + V
V+V+V
OUT IN(MAX) OUT
IN(MAX) TOTAL
SEC FWD
OUT(MIN) RECT SENSE
V =
0.02 x R
R
0.0003 x Lx 1 / V 1 / (V - V )
(R ) x C
NOISE(p-p)
ESR
SENSE
OUT IN OUT
SENSE
2
OUT
+
+
[]
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
______________________________________________________________________________________ 21
where: on-state voltage drop V
Q_
= I
LOAD
x R
DS(ON)
C
RSS
= MOSFET reverse transfer capacitance
I
GATE
=DH driver peak output current capabil-
ity (1A typical)
20ns = DH driver inherent rise/fall time
Under output short-circuit, the MAX1633/MAX1634/
MAX1635’s synchronous rectifier MOSFET suffers extra
stress because its duty factor can increase to greater
than 0.9. It may need to be oversized to tolerate a con-
tinuous DC short circuit. During short circuit, the
MAX1630/MAX1631/MAX1632’s output undervoltage
shutdown protects the synchronous rectifier under out-
put short-circuit conditions.
To reduce EMI, add a 0.1µF ceramic capacitor from the
high-side switch drain to the low-side switch source.
Rectifier Clamp Diode
The rectifier is a clamp across the low-side MOSFET
that catches the negative inductor swing during the
60ns dead time between turning one MOSFET off and
each low-side MOSFET on. The latest generations of
MOSFETs incorporate a high-speed silicon body diode,
which serves as an adequate clamp diode if efficiency
is not of primary importance. A Schottky diode can be
placed in parallel with the body diode to reduce the for-
ward voltage drop, typically improving efficiency 1% to
2%. Use a diode with a DC current rating equal to one-
third of the load current; for example, use an MBR0530
(500mA-rated) type for loads up to 1.5A, a 1N5819 type
for loads up to 3A, or a 1N5822 type for loads up to
10A. The rectifier’s rated reverse breakdown voltage
must be at least equal to the maximum input voltage,
preferably with a 20% derating factor.
Boost-Supply Diode D2
A signal diode such as a 1N4148 works well in most
applications. If the input voltage can go below +6V, use
a small (20mA) Schottky diode for slightly improved
efficiency and dropout characteristics. Don’t use large
power diodes, such as 1N5817 or 1N4001, since high
junction capacitance can pump up VL to excessive
voltages.
Rectifier Diode D3
(Transformer Secondary Diode)
The secondary diode in coupled-inductor applications
must withstand flyback voltages greater than 60V,
which usually rules out most Schottky rectifiers.
Common silicon rectifiers, such as the 1N4001, are also
prohibited because they are too slow. This often makes
fast silicon rectifiers such as the MURS120 the only
choice. The flyback voltage across the rectifier is relat-
ed to the V
IN
- V
OUT
difference, according to the trans-
former turns ratio:
where: N = the transformer turns ratio SEC/PRI
V
SEC
= the maximum secondary DC output
voltage
V
OUT
= the primary (main) output voltage
Subtract the main output voltage (V
OUT
) from V
FLYBACK
in this equation if the secondary winding is returned to
V
OUT
and not to ground. The diode reverse breakdown
rating must also accommodate any ringing due to leak-
age inductance. D3’s current rating should be at least
twice the DC load current on the secondary output.
Low-Voltage Operation
Low input voltages and low input-output differential
voltages each require extra care in their design. Low
absolute input voltages can cause the VL linear regula-
tor to enter dropout and eventually shut itself off. Low
input voltages relative to the output (low V
IN
-V
OUT
dif-
ferential) can cause bad load regulation in multi-output
flyback applications (see the design equations in the
Transformer Design section). Also, low V
IN
-V
OUT
differ-
entials can also cause the output voltage to sag when
the load current changes abruptly. The amplitude of the
sag is a function of inductor value and maximum duty
factor (an Electrical Characteristics parameter, 98%
guaranteed over temperature at f = 200kHz), as follows:
The cure for low-voltage sag is to increase the output
capacitor’s value. For example, at V
IN
= +5.5V, V
OUT
=
+5V, L = 10µH, f = 200kHz, I
STEP
= 3A, a total capaci-
tance of 660µF keeps the sag less than 200mV. Note
that only the capacitance requirement increases, and
the ESR requirements don’t change. Therefore, the
added capacitance can be supplied by a low-cost bulk
capacitor in parallel with the normal low-ESR capacitor.
V=
(I ) x L
2 x C x (V x D - V )
SAG
STEP
2
OUT IN(MAX) MAX OUT
V = V + (V - V ) x N
FLYBACK SEC IN OUT
PD(upper FET) = (I ) x R x DUTY
+ V x I x f x
V x C
I
20ns
PD(lower FET) = (I ) x R x (1 - DUTY)
DUTY = (V + V ) / (V - V )
LOAD
2
DS(ON)
IN LOAD
IN RSS
GATE
LOAD
2
DS(ON)
OUT Q2 IN Q1
+
⎛
⎝
⎜
⎞
⎠
⎟
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

MAX1631EAI+

Mfr. #:
Buy MAX1631EAI+
Manufacturer:
Maxim Integrated
Description:
Switching Controllers Multi-Out Low-Noise Power-Supply Ctlr
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