MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
22 ______________________________________________________________________________________
Table 5. Low-Voltage Troubleshooting Chart
SYMPTOM
Sag or droop in V
OUT
under
step-load change
CONDITION
Low V
IN
-V
OUT
differential, <1.5V
ROOT CAUSE
Limited inductor-current
slew rate per cycle.
SOLUTION
Increase bulk output capacitance
per formula (see Low-Voltage
Operation section). Reduce inductor
value.
Low V
IN
-V
OUT
differential, <1V
Maximum duty-cycle limits
exceeded.
Dropout voltage is too high
(V
OUT
follows V
IN
as V
IN
decreases)
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Low V
IN
-V
OUT
differential,
V
IN
< 1.3 x V
OUT
(main)
Not enough duty cycle left
to initiate forward-mode
operation. Small AC current
in primary can’t store ener-
gy for flyback operation.
Low V
IN
-V
OUT
differential, <0.5V
Secondary output won’t
support a load
Reduce operation to 200kHz.
Reduce secondary impedances;
use a Schottky diode, if possible.
Stack secondary winding on the
main output.
Normal function of internal
low-dropout circuitry.
Unstable—jitters between
different duty factors and
frequencies
Increase the minimum input voltage
or ignore.
Low input voltage, <4.5V
VL output is so low that it
hits the VL UVLO threshold.
Low input voltage, <5V
Won’t start under load or
quits before battery is
completely dead
Supply VL from an external source
other than V
IN
, such as the system
+5V supply.
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
Poor efficiency
Use a small 20mA Schottky diode
for boost diode D2. Supply VL from
an external source.
________________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
P(I
2
R) = I
2
R losses
P(tran) = transition losses
P(gate) = gate-charge losses
P(diode) = diode-conduction losses
P(cap) = capacitor ESR losses
P(IC) = losses due to the IC’s operating supply
supply current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they aren’t accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well.
where R
DC
is the DC resistance of the coil, R
DS(ON)
is
the MOSFET on-resistance, and R
SENSE
is the current-
sense resistor value. The R
DS(ON)
term assumes identi-
cal MOSFETs for the high-side and low-side switches,
because they time-share the inductor current. If the
MOSFETs aren’t identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
where C
RSS
is the reverse transfer capacitance of the
high-side MOSFET (a data-sheet parameter), I
GATE
is the
DH gate-driver peak output current (1.5A typical), and
20ns is the rise/fall time of the DH driver (20ns typical).
P(gate) = qG x f x VL
where VL is the internal-logic-supply voltage (+5V), and qG
is the sum of the gate-charge values for low-side and high-
side switches. For matched MOSFETs, qG is twice the
data-sheet value of an individual MOSFET. If V
OUT
is set to
less than 4.5V, replace VL in this equation with V
BATT
. In
this case, efficiency can be improved by connecting VL to
an efficient 5V source, such as the system +5V supply.
P(diode) = diode- conduction losses
= I x V x t x f
LOAD FWD D
PD(tran) = transition loss = V x I x f x
3
2
x
(V x C / I ) + 20ns
IN LOAD
IN RSS GATE
[]
Efficiency = P / P x 100%
= P / (P + P ) x 100%
P = P(I R) + P(tran) + P(gate) +
P(diode) + P(cap) + P(IC)
P = (I R) = (I ) x (R + R + R )
OUT IN
OUT OUT TOTAL
TOTAL
2
2
LOAD
2
DC DS(ON) SENSE
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
______________________________________________________________________________________ 23
where t
D
is the diode-conduction time (120ns typical)
and V
FWD
is the forward voltage of the diode.
This power is dissipated in the MOSFET body diode if
no external Schottky diode is used.
where I
RMS
is the input ripple current as calculated in the
Design Procedure and Input Capacitor Value sections.
Light-Load Efficiency Considerations
Under light loads, the PWM operates in discontinuous
mode, where the inductor current discharges to zero at
some point during the switching cycle. This makes the
inductor current’s AC component high compared to the
load current, which increases core losses and I
2
R loss-
es in the output filter capacitors. For best light-load effi-
ciency, use MOSFETs with moderate gate-charge
levels, and use ferrite, MPP, or other low-loss core
material. Avoid powdered-iron cores; even Kool-Mu
(aluminum alloy) is not as good as ferrite.
PC Board Layout Considerations
Good PC board layout is required in order to achieve
specified noise, efficiency, and stability performance.
The PC board layout artist must be given explicit
instructions, preferably a pencil sketch showing the
placement of power-switching components and high-
current routing. See the PC board layout in the
MAX1630 Evaluation Kit manual for examples. A
ground plane is essential for optimum performance. In
most applications, the circuit will be located on a multi-
layer board, and full use of the four or more copper lay-
ers is recommended. Use the top layer for high-current
connections, the bottom layer for quiet connections
(REF, SS, GND), and the inner layers for an uninterrupt-
ed ground plane. Use the following step-by-step guide:
1) Place the high-power components (Figure1, C1, C3,
Q1, Q2, D1, L1, and R1) first, with any grounded
connections adjacent.
Priority 1: Minimize current-sense resistor trace
lengths and ensure accurate current
sensing with Kelvin connections (Figure 7).
Priority 2: Minimize ground trace lengths in the
high-current paths (discussed below).
Priority 3: Minimize other trace lengths in the high-
current paths.
Use >5mm-wide traces
C
IN
to high-side MOSFET drain: 10mm
max length
Rectifier diode cathode to low-side
MOSFET: 5mm max length
LX node (MOSFETs, rectifier cathode,
inductor): 15mm max length
Ideally, surface-mount power components are butted
up to one another with their ground terminals almost
touching. These high-current grounds are then con-
nected to each other with a wide filled zone of top-layer
copper so they don’t go through vias. The resulting top-
layer “sub-ground-plane” is connected to the normal
inner-layer ground plane at the output ground termi-
nals, which ensures that the IC’s analog ground is
sensing at the supply’s output terminals without interfer-
ence from IR drops and ground noise. Other high-
current paths should also be minimized, but focusing
primarily on short ground and current-sense con-
nections eliminates about 90% of all PC board lay-
out problems (see the PC board layouts in the
MAX1630 Evaluation Kit manual for examples).
2) Place the IC and signal components. Keep the main
switching nodes (LX nodes) away from sensitive
analog components (current-sense traces and REF
capacitor). Place the IC and analog components on
the opposite side of the board from the power-
switching node. Important: the IC must be no far-
ther than 10mm from the current-sense resistors.
Keep the gate-drive traces (DH_, DL_, and BST_)
shorter than 20mm and route them away from CSH_,
CSL_, and REF.
3) Use a single-point star ground where the input
ground trace, power ground (sub-ground-plane),
and normal ground plane meet at the supply’s out-
put ground terminal. Connect both IC ground pins
and all IC bypass capacitors to the normal ground
plane.
P(cap) = input capacitor ESR loss = (I ) x R
RMS
2
ESR
MAX1630
SENSE RESISTOR
HIGH CURRENT PATH
Figure 7. Kelvin Connections for the Current-Sense Resistors
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
24 ______________________________________________________________________________________
_______________________________________________________________________________Application Circuits
RESET
FB5
MAX1630
MAX1633
SHDN SYNC
INPUT
+5.2V TO +24V
PGND
SEQ
REF
11
9
15
12
13
14
20
19
17
16
Q3
Q4
L2 R2
C2
18
4
23 22
10Ω
621
POWER-GOOD
7
10 8
5V ON/OFF
SKIP
V+ VL
DL5
LX5
DH5
BST5
2.2μF
0.1μF
0.1μF
0.1μF
1μF
0.1μF
4.7μF
2.7μF
1N5819
4.7μF
12OUT
C3
C4
+12V
AT 120mA
+5V OUTPUT (3A)
+5V
ALWAYS ON
GND
+2.5V REF
3
*
2
1
24
Q1
Q2
T1
1:4
C1
R1
5
0.1μF
0.1μF
1N5819
+3.3V
OUTPUT
(3A)
*
TIME/ON5
RUN/ON3
FB3
28
3V ON/OFF
26
25
27
CSL5
CSH5
CSL3
CSH3
DL3
LX3
DH3
BST3
V
DD
ON/OFF
TO +3.3V OUTPUT TO +5V OUTPUT
R1 = R2 = 20mΩ
L2 = 10μH SUMIDA CDRH125-100
T1 = 10μH 1:4 TRANSFORMER
TRANSPOWER TECHNOLOGIES TTI-5902
Q1–Q4 = Si4410DY or IRF7413
C1 = 3 x 220μF 10V SPRAGUE 594D227X0010D2T
C2 = 2 x 220μF 10V SPRAGUE 594D227X0010D2T
C3 = C4 = 2 x 10μF 30V SANYO OS-CON 30SC10M
*VL DIODES AND OUTPUT SCHOTTKY DIODES REQUIRED
FOR THE MAX1630 ONLY (SEE OUTPUT OVERVOLTAGE PROTECTION
AND OUTPUT UNDERVOLTAGE SHUTDOWN PROTECTION SECTIONS).
**
Figure 8. Triple-Output Application for Low-Voltage Batteries (MAX1630/MAX1633)

MAX1631EAI+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Controllers Multi-Out Low-Noise Power-Supply Ctlr
Lifecycle:
New from this manufacturer.
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