Clock operations M48T58, M48T58Y
16/33 Doc ID 2412 Rev 8
Table 5. Register map
Keys:
S = SIGN bit
FT = FREQUENCY TEST bit
R = READ bit
W = WRITE bit
ST = STOP bit
0 = Must be set to '0'
BLE = Battery low enable bit
BL = Battery low bit (read only)
CEB = Century enable bit
CB = Century bit
Note: When CEB is set to '1,' CB will toggle from '0' to '1' or from '1' to '0' at the turn of the century
(dependent upon the initial value set).
When CEB is set to '0,' CB will not toggle. The WRITE bit does not need to be set to write to
CEB.
6.4 Calibrating the clock
The M48T58/Y is driven by a quartz-controlled oscillator with a nominal frequency of 32,768
Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator frequency
error at 25°C, which equates to about ±1.53 minutes per month. With the calibration bits
properly set, the accuracy of each M48T58/Y improves to better than +1/–2 ppm at 25°C.
The oscillation rate of any crystal changes with temperature (see Figure 8 on page 18).
Most clock chips compensate for crystal frequency and temperature shift error with
cumbersome “trim” capacitors. The M48T58/Y design, however, employs periodic counter
correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in Figure 9 on page 18. The number of times pulses
are blanked (subtracted, negative calibration) or split (added, positive calibration) depends
upon the value loaded into the five calibration bits found in the control register. Adding
counts speeds the clock up, subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register 1FF8h.
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is the
Address
Data
Function/range
BCD format
D7 D6 D5 D4 D3 D2 D1 D0
1FFFh 10 Years Year Year 00-99
1FFEh 0 0 0 10 M Month Month 01-12
1FFDh BLE BL 10 date Date Date 01-31
1FFCh 0 FT CEB CB 0 Day Century/day 0-1/1-7
1FFBh 0 0 10 hours Hours Hours 00-23
1FFAh 0 10 minutes Minutes Minutes 00-59
1FF9h ST 10 seconds Seconds Seconds 00-59
1FF8h W R S Calibration Control
M48T58, M48T58Y Clock operations
Doc ID 2412 Rev 8 17/33
sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register. Assuming that the oscillator is in
fact running at exactly 32,768 Hz, each of the 31 increments in the calibration byte would
represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or –
2.75 minutes per month.
Two methods are available for ascertaining how much calibration a given M48T58/Y may
require. The first involves simply setting the clock, letting it run for a month and comparing it
to a known accurate reference (like WWV broadcasts). While that may seem crude, it allows
the designer to give the end user the ability to calibrate his clock as his environment may
require, even after the final product is packaged in a non-user serviceable enclosure. All the
designer has to do is provide a simple utility that accesses the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the use
of some test equipment. When the frequency test (FT) bit (D6 in the day register) is set to a
'1,' and D7 of the seconds register is a '0' (oscillator running), The frequency test (pin 1) will
toggle at 512 Hz. Any deviation from 512 Hz indicates the degree and direction of oscillator
frequency shift at the test temperature. For example, a reading of 512.01024 Hz would
indicate a +20 ppm oscillator frequency error, requiring a –10 (WR001010) to be loaded into
the calibration byte for correction.
The frequency test pin is an open drain output which requires a pull-up resistor for proper
operation. A 500-10 kΩ resistor is recommended in order to control the rise time.
For more information on calibration, see application note AN934, “TIMEKEEPER
®
calibration.
Clock operations M48T58, M48T58Y
18/33 Doc ID 2412 Rev 8
Figure 8. Crystal accuracy across temperature
Figure 9. Clock calibration
AI02124
-80
-60
-100
-40
-20
0
20
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
ΔF
= -0.038 (T - T
0
)
2
± 10%
F
ppm
C
2
T
0
= 25 °C
ppm
°C
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION

M48T58Y-70PC1

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock 64K (8Kx8) 70ns
Lifecycle:
New from this manufacturer.
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