LT4250L/LT4250H
7
4250lhfa
TEST CIRCUIT
TIMING DIAGRAM
PWRGD/PWRGD V
DD
V
+
5V
OV
V
DRAIN
48V
R
5k
DRAIN
LT4250L/LT4250H
UV GATE
V
EE
SENSE
V
SENSE
4250 F01a
V
UV
V
OV
+
PWRGD/PWRGD V
DD
OV
48V
20V
DRAIN
LT4250L/LT4250H
UV GATE
V
EE
SENSE
4250 F01b
V
UV
0.1μF
+
+
10k
10Ω
10Ω
IRF530
Figure 1a. Test Circuit 1 Figure 1b. Test Circuit 2
2V
1V
4250 F02
t
PHLOV
1.255V
0V
OV
GATE
1V
1.235V
t
PLHOV
2V
1V
4250 F03
t
PHLUV
1.125V
0V
UV
GATE
1V
1.255V
t
PLHUV
1V
4250 F04a
t
PHLSENSE
60mV
SENSE
GATE
100mV
V
EE
1V
4250 F04b
t
PHLCB
UV
GATE
1V
4250 F05a
V
PWRGD
– V
DRAIN
= 0V
DRAIN
PWRGD
1V
1.4V
V
EE
DRAIN
PWRGD
1V
1.4V
t
PHLDL
t
PHLDL
V
EE
V
EE
4250 F05b
V
PWRGD
– V
DRAIN
= 0
GATE
PWRGD
1V
1.4V
1.4V
V
EE
GATE
PWRGD
1V
t
PHLGH
t
PHLGH
ΔV
GATE
– V
GATE
= 0
ΔV
GATE
– V
GATE
= 0
Figure 2. OV to GATE Timing Figure 3. UV to GATE Timing
Figure 4a. SENSE to GATE Timing Figure 4b. Active Current Limit Timeout
Figure 5a. DRAIN to PWRGD/PWRGD Timing Figure 5b. GATE to PWRGD/PWRGD Timing
LT4250L/LT4250H
8
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APPLICATIONS INFORMATION
Figure 6a. Inrush Control Circuitry
Figure 6b. Inrush Control Waveforms
Hot Circuit Insertion
When circuit boards are inserted into a live –48V back-
plane, the bypass capacitors at the input of the board’s
power module or switching power supply can draw huge
transient currents as they charge up. The transient currents
can cause permanent damage to the board’s components
and cause glitches on the system power supply.
The LT4250 is designed to turn on a board’s supply volt-
age in a controlled manner, allowing the board to be safely
inserted or removed from a live backplane. The chip also
provides undervoltage, overvoltage and overcurrent pro-
tection while keeping the power module off until its input
voltage is stable and within tolerance.
Power Supply Ramping
The input to the power module on a board is controlled by
placing an external N-channel pass transistor (Q1) in the
power path (Figure 6a). R1 provides current fault detection
and R2 prevents high frequency oscillations. Resistors R4,
R5 and R6 provide undervoltage and over-voltage sensing.
By ramping the gate of Q1 up at a slow rate, the inrush
current charging load capacitors C3 and C4 can be limited
to a safe value when the board makes connection.
Resistor R3 and capacitor C2 act as a feedback network
to accurately control the inrush current. The C2 capacitor
can be calculated with the following equation:
C2 = (45μA • C
L
)/I
INRUSH
where C
L
is the total load capacitance = C3 + C4 + module
input capacitance.
Capacitor C1 and resistor R3 prevent Q1 from momentarily
turning on when the power pins first make contact. Without
C1 and R3, capacitor C2 would pull the gate of Q1 up to
a voltage roughly equal to V
EE
• C2/CGS(Q1) before the
LT4250 could power up and actively pull the gate low. By
placing capacitor C1 in parallel with the gate capacitance
of Q1 and isolating them from C2 using resistor R3 the
problem is solved. The value of C1 is given by:
C1=
V
INMAX
V
TH
V
TH
C2+C
GD
()
C1 35 • C2 for V
INMAX
= 72V
where V
TH
is the MOSFETs minimum gate threshold and
V
INMAX
is the maximum operating input voltage.
R3 should not exceed a value that produces an R3 • C2
time-constant of 150μs. A 1k value for R3 will ensure this
for C2 values up to 150nF.
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT4250 senses an undervoltage
condition and the GATE is immediately pulled low when
the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts
to ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
+
V
EE
V
DD
LT4250H PWRGD
UV = 38.5V
OV = 71V
SENSE
C1
470nF
25V
C3
0.1μF
100V
C4
100μF
100V
C5
100μF
16V
Q1
IRF530
R2
10Ω
5%
R3
1k, 5%
C2
15nF
100V
R4
549k
1%
R5
6.49k
1%
R6
10k
1%
R1
0.02Ω
5%
4
3
2
OV
–48V RTN
–48V RTN
(SHORT PIN)
–48V
UV
56
8
7
1
GATE DRAIN
VICOR
VI-J30-CY
V
OUT
+
V
OUT
V
IN
+
5V
4250 F06a
GATE IN
V
IN
+
*
* DIODES INC. SMAT70A
43
21
INRUSH
CURRENT
500mA/DIV
GATE –V
EE
10V/DIV
DRAIN
50V/DIV
V
EE
50V/DIV
25ms/DIV
4250 F06b
CONTACT
BOUNCE
MODULE
TURN-ON
MODULE
TURN-ON
CONTACT
BOUNCE
LT4250L/LT4250H
9
4250lhfa
DRAIN voltage has finished ramping, the GATE pin then
ramps to its final value.
Current Limit/Electronic Circuit Breaker
The LT4250 features a current limit function that protects
against short circuits or excessive supply currents. If the
current limit is active for more than 500μs the electronic
circuit breaker will trip. By placing a sense resistor between
the V
EE
and SENSE pin, the current limit will be activated
whenever the voltage across the sense resistor is greater
than 50mV.
Note that the current limit threshold should be set suffi-
ciently high to account for the sum of the load current
and the inrush current. The maximum value of the inrush
current is given by:
I
INRUSH
0.8
40mV
R
SENSE
–I
LOAD,
where the 0.8 factor is used as a worst case margin com-
bined with the minimum trip voltage (40mV).
In the case of a short circuit, the current limit circuitry
activates and immediately pulls the GATE low, servos the
SENSE voltage to 50mV, and starts a 500μs timer. The
MOSFET current is limited to 50mV/R
SENSE
(see Figure 7).
If the short circuit persists for more than 500μs, the circuit
breaker trips and pulls the GATE pin low, shutting off the
MOSFET. The circuit breaker is reset by pulling UV low,
or by cycling power to the part. If the short circuit clears
before the 500μs timing interval the current limit will
deactivate and release the GATE.
APPLICATIONS INFORMATION
Figure 7. Short-Circuit Protection Waveforms
DRAIN
50V/DIV
GATE
10V/DIV
I
D
(Q1)
5A/DIV
1ms/DIV
The LT4250 guards against voltage steps on the input
supply. A positive voltage step (increasing in magnitude)
on the input supply causes an inrush current that is
proportional to the voltage slew rate I = C
L
ΔV/ΔT. If the
inrush exceeds 50mV/R
SENSE
, the current limit will activate
as shown in Figure 8. The GATE pin pulls low, limiting the
current to 50mV/R
SENSE
. At this level the MOSFET drain
will not follow the source as the input voltage rapidly
changes, but instead remains at the voltage stored on the
load capacitance. The load capacitance begins to charge
at a current of 50mV/R
SENSE
, but not for long. As the load
capacitance charges, C2 pushes back on the gate and limits
the MOSFET current in a manner identical to the initial start-
up condition which is less than the short circuit limiting
value of 50mV/R
SENSE
. Thus the circuit breaker does not
trip. To ensure correct operation under input voltage step
conditions, R
SENSE
must be chosen to provide a current
limit value greater than the sum of the load current and
the dynamic current in the load capacitance.
For C2 values less than 10nF a positive voltage step
increasing in magnitude on the input supply can result
in the Q1 turning off momentarily due to current limit
overshoot which can shut down the output. By adding an
additional resistor and diode, Q1 remains on during the
voltage step. This is shown as D1 and R7 in Figure 9. The
purpose of D1 is to shunt current around R7 when the
power pins first make contact and allow C1 to hold the
GATE low. The value of R7 should be sized to generate an
R7 • C1 time constant of 33μs.
Under some conditions, a short circuit at the output can
cause the input supply to dip below the UV threshold. The
LT4250 turns off once and then turns on until the electronic
circuit breaker is tripped. This can be minimized by adding
a deglitching delay to the UV pin with a capacitor from UV
to V
EE
. This capacitor forms an RC time constant with the
resistors at UV, allowing the input supply to recover before
the UV pin resets the circuit breaker.

LT4250LCN8

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Hot Swap Voltage Controllers LT4250 - Negative 48V Hot Swap Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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