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SRI512-W4/1GE

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P47
SRI512 Data transfer
Doc ID 13263 Rev 5 13/47
3.4 CRC
The 16-bit CRC used by the SRI512 is generated in compliance with the ISO14443 Type B
recommendation. For further information, please see Appendix A. The initial register
contents are all 1’s: FFFFh.
The two-byte CRC is present in every request and in every answer frame, before the EOF.
The CRC is calculated on all the bytes between SOF (not included) and the CRC field.
Upon reception of a request from a reader, the SRI512 verifies that the CRC value is valid. If
it is invalid, the SRI512 discards the frame and does not answer the reader.
Upon reception of an answer from the SRI512, the reader should verify the validity of the
CRC. In case of error, the actions to be taken are the reader designer’s responsibility.
The CRC is transmitted with the least significant byte first and each byte is transmitted with
the least significant bit first.
Figure 11. CRC transmission rules
Memory mapping SRI512
14/47 Doc ID 13263 Rev 5
4 Memory mapping
The SRI512 is organized as 16 blocks of 32 bits as shown in Ta bl e 3 . All blocks are
accessible by the Read_block command. Depending on the write access, they can be
updated by the Write_block command. A Write_block updates all the 32 bits of the block.
Table 3. SRI512 memory mapping
Block
Addr
Msb 32-bit block Lsb
b
31
b
16
b
15
b
14
b
8
b
7
b
0
Description
0 32 bits Boolean area
Resettable OTP
bits
1 32 bits Boolean area
2 32 bits Boolean area
3 32 bits Boolean area
4 32 bits Boolean area
5 32 bits binary counter
Count down
Counter
6 32 bits binary counter
7User area
Lockable
EEPROM
8User area
9User area
10 User area
11 User area
12 User area
13 User area
14 User area
15 User area
255 OTP_Lock_Reg 0 ST Reserved
Fixed Chip_ID
(Option)
System OTP bits
UID0
64 bits UID area ROM
UID1
SRI512 Memory mapping
Doc ID 13263 Rev 5 15/47
4.1 Resettable OTP area
This area contains five individual 32-bit Boolean words (see Figure 12 for a map of the
area). A Write_block command will not erase the previous contents of the block as the write
cycle is not preceded by an auto-erase cycle. This feature can be used to reset selected bits
from 1 to 0. All bits previously at 0 remain unchanged. When the 32 bits of a block are all at
0, the block is empty, and cannot be updated any more. See Figure 13 and Figure 14 for
examples of the result of the Write_block command in the resettable OTP area.
Figure 12. Resettable OTP area (addresses 0 to 4)
Figure 13. Write_block update in standard mode (binary format)
The five 32-bit blocks making up the Resettable OTP area can be erased in one go by
adding an auto-erase cycle to the Write_block command. An auto-erase cycle is added
each time the SRI512 detects a Reload command. The Reload command is implemented
through a specific update of the 32-bit binary counter located at block address 6 (see
Section 4.2: 32-bit binary counters for details).
Block
Address
MSb
b31
32-bit Block
b16 b15 b14 b8 b7
LSb
b0
Description
Resettable
OTP Bit
0
1
2
3
4
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
ai12381
ai07658
1 ... 1 1 01011111 0 11
1 ... 1 0 01011001 1 11
1 ... 1 0 01011001 0 11
Previous data stored in block
Data to be written
New data stored in block
b31 b0
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P47

SRI512-W4/1GE

Mfr. #:
Buy SRI512-W4/1GE
Manufacturer:
STMicroelectronics
Description:
IC RFID TRANSP 13.56MHZ DIE
Lifecycle:
New from this manufacturer.
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