Memory mapping SRI512
16/47 Doc ID 13263 Rev 5
Figure 14. Write_block update in reload mode (binary format)
4.2 32-bit binary counters
The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to
count down from 2
32
(4096 million) to 0. The SRI512 uses dedicated logic that only allows
the update of a counter if the new value is lower than the previous one. This feature allows
the application to count down by steps of 1 or more. The initial value is FFFF FFFEh in
counter 5 and, FFFF FFFFh in counter 6. When the value displayed is 0000 0000h, the
counter is empty and cannot be reloaded. The counter is updated by issuing the Write_block
command to block address 5 or 6, depending on which counter is to be updated. The
Write_block command writes the new 32-bit value to the counter block address. Figure 16
shows examples of how the counters operate.
The counter programming cycles are protected by automated antitearing logic. This function
allows the counter value to be protected in case of power down within the programming
cycle. In case of power down, the counter value is not updated and the previous value
continues to be stored.
Blocks 5 and 6 can be write-protected using the OTP_Lock_Reg bits (block 255). Once a
block has been protected, its contents cannot be modified. A protected counter block
behaves like a ROM block.
Figure 15. Binary counter (addresses 5 to 6)
ai07659
1...110 1011111 0 11
1...111 1011001 1 11
1...111 1011001 1 11
Previous data stored in block
Data to be written
New data stored in block
b31 b0
Block
address
MSb 32-bit block LSb
Description
Count down
counter
5
6
32-bit binary counter
32-bit binary counter
ai12384b
b31 b16 b15 b14 b8 b7 b0
