NCP4308
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24
Power Dissipation Calculation
It is important to consider the power dissipation in the
MOSFET driver of a SR system. If no external gate resistor
is used and the internal gate resistance of the MOSFET is
very low, nearly all energy losses related to gate charge are
dissipated in the driver. Thus it is necessary to check the SR
driver power losses in the target application to avoid over
temperature and to optimize efficiency.
In SR systems the body diode of the SR MOSFET starts
conducting before SR MOSFET is turned−on, because there
is some delay from V
TH_CS_ON
detect to turn−on the driver.
On the other hand, the SR MOSFET turn off process always
starts before the drain to source voltage rises up
significantly. Therefore, the MOSFET switch always
operates under Zero Voltage Switching (ZVS) conditions
when in a synchronous rectification system.
The following steps show how to approximately calculate
the power dissipation and DIE temperature of the NCP4308
controller. Note that real results can vary due to the effects
of the PCB layout on the thermal resistance.
Step 1 − MOSFET Gate−to Source Capacitance:
During ZVS operation the gate to drain capacitance does
not have a Miller effect like in hard switching systems
because the drain to source voltage does not change (or its
change is negligible).
Figure 51. Typical MOSFET Capacitances
Dependency on V
DS
and V
GS
Voltages
C
iss
+ C
gs
) C
gd
C
rss
+ C
gd
C
oss
+ C
ds
) C
gd
Therefore, the input capacitance of a MOSFET operating
in ZVS mode is given by the parallel combination of the gate
to source and gate to drain capacitances (i.e. C
iss
capacitance
for given gate to source voltage). The total gate charge,
Q
g_total
, of most MOSFETs on the market is defined for hard
switching conditions. In order to accurately calculate the
driving losses in a SR system, it is necessary to determine the
gate charge of the MOSFET for operation specifically in a
ZVS system. Some manufacturers define this parameter as
Q
g_ZVS
. Unfortunately, most datasheets do not provide this
data. If the C
iss
(or Q
g_ZVS
) parameter is not available then
it will need to be measured. Please note that the input
capacitance is not linear (as shown Figure 51) and it needs
to be characterized for a given gate voltage clamp level.
Step 2 − Gate Drive Losses Calculation:
Gate drive losses are affected by the gate driver clamp
voltage. Gate driver clamp voltage selection depends on the
type of MOSFET used (threshold voltage versus channel
resistance). The total power losses (driving loses and
conduction losses) should be considered when selecting the
gate driver clamp voltage. Most of today’s MOSFETs for SR
systems feature low R
DS(on)
for 5 V V
GS
voltage. The
NCP4308 offers both a 5 V gate clamp and a 10 V gate
clamp for those MOSFET that require higher gate to source
voltage.
The total driving loss can be calculated using the selected
gate driver clamp voltage and the input capacitance of the
MOSFET:
P
DRV_total
+ V
CC
@ V
CLAMP
@ C
g_ZVS
@ f
SW
(eq. 9)
Where:
V
CC
is the NCP4308 supply voltage
V
CLAMP
is the driver clamp voltage
C
g_ZVS
is the gate to source capacitance of the
MOSFET in ZVS mode
f
sw
is the switching frequency of the target
application
The total driving power loss won’t only be dissipated in
the IC, but also in external resistances like the external gate
resistor (if used) and the MOSFET internal gate resistance
(Figure 50). Because NCP4308 features a clamped driver,
it’s high side portion can be modeled as a regular driver
switch with equivalent resistance and a series voltage
source. The low side driver switch resistance does not drop
immediately at turn−off, thus it is necessary to use an
equivalent value (R
DRV_SIN_EQ
) for calculations. This
method simplifies power losses calculations and still
provides acceptable accuracy. Internal driver power
dissipation can then be calculated using Equation 10:
