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ISL12032IVZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
4
FN6618.3
May 5, 2011
Absolute Maximum Ratings Thermal Information
Voltage on V
DD
, VBAT, SCL, SDA, ACRDY, AC, LV, EVDET, EVIN,
IRQ
, F
OUT
pins
(respect to ground) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Voltage on X1 and X2 pins
(respect to ground) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.5V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3014) . . . . .>2kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>200V
Thermal Resistance (Typical, Note 4)
JA
(°C/W)
14 Ld TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature (T
A
) . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (V
DD
) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Supply Voltage (VBAT) . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
DC Operating Characteristics Specifications apply for: V
DD
= 2.7V to 5.5V, T
A
= -40°C to +85°C, unless otherwise stated. Boldface
limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL PARAMETER CONDITIONS
MIN
(Note 13)
TYP
(Note 7)
MAX
(Note 13) UNITS NOTES
V
DD
Main Power Supply 2.7 5.5 V
VBAT Battery Supply Voltage 1.8 5.5 V
I
DD1
Supply Current V
DD
= 5V, SCL, SDA = V
DD
27 60 µA 6
V
DD
= 3V, SCL, SDA = V
DD
16 45 µA 6
I
DD2
Supply Current (I
2
C Communications
Active)
V
DD
= 5V 43 75 µA 5, 8
I
DD3
Supply Current for Timekeeping
at AC Input
V
DD
= 5.5V at T
A
= +25°C,
F
OUT
disabled
9.0 18.0 µA 5, 6
IBAT Battery Supply Current VBAT = 5.5V at T
A
= +25°C 1.0 1.8 µA 5, 11
VBAT = 2.7V 0.8 1.2 5, 11
VBAT = 1.8V 0.7 1.0 µA 5, 11
IBAT
LKG
Battery Input Leakage V
DD
= 5.5V, VBAT = 1.8V
TRKEN = 0
100 nA
I
LI
Input Leakage Current on SCL 1 µA
I
LO
I/O Leakage Current on SDA 1 µA
VBAT
M
Battery Level Monitor Threshold V
DD
= 5.5V, VBAT = 1.8V -150 +150 mV
V
PBM
Brownout Level Monitor Threshold -150 +150 mV
V
TRIP
VBAT Mode Threshold 2.0 2.2 2.4 V
V
TRIPHYS
V
TRIP
Hysteresis 30 mV
VBAT
HYS
VBAT Hysteresis 50 mV
RTRK Trickle Charge Resistance V
DD
= 5.5V, VBAT = 3.0V,
TRKR01 = 0, TRKR00 = 0
1300
V
DD
= 5.5V, VBAT = 3.0V,
TRKR01 = 0, TRKR00 = 1
2200
V
DD
= 5.5V, VBAT = 3.0V,
TRKR01 = 1, TRKR00 = 0
3600
V
DD
= 5.5V, VBAT = 3.0V,
TRKR01 = 1, TRKR00 = 1
7800
VTRKTERM VBAT Charging Termination Point VDD -
50mV
V
ISL12032
5
FN6618.3
May 5, 2011
VTRKHYS Trickle Charge ON-OFF Hysteresis 50 mV
IRQ
/ACRDY/LV/EVDET (OPEN DRAIN OUTPUTS)
V
OL
Output Low Voltage V
DD
= 5V, I
OL
= 3mA 0.4 V
V
DD
= 2.7V, I
OL
= 1mA 0.4 V
F
OUT
(CMOS OUTPUT)
V
OL
Output Low Voltage I
OH
= 1mA 0.3 x V
DD
V
V
OH
Output High Voltage 0.7 x V
DD
V
EVIN
I
EVPU
EVIN Pull-up Current V
DD
= 5.5V, VBAT = 3.0V 1.0 3.0 8.0 µA
V
DD
= 0V, VBAT = 1.8V 100 600 nA
V
IL
Input Low Voltage 0.3 x V
DD
V
V
IH
Input High Voltage 0.7 x V
DD
V
I
EVPD
EVIN Disabled Pull-down Current V
DD
= 5.5V 200 nA
DC Operating Characteristics Specifications apply for: V
DD
= 2.7V to 5.5V, T
A
= -40°C to +85°C, unless otherwise stated. Boldface
limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL PARAMETER CONDITIONS
MIN
(Note 13)
TYP
(Note 7)
MAX
(Note 13) UNITS NOTES
Power-Down Timing Specifications apply for: V
DD
= 2.7V to 5.5V, T
A
= -40°C to +85°C, unless otherwise stated. Boldface limits apply over
the operating temperature range, -40°C to +85°C.
SYMBOL PARAMETER CONDITIONS
MIN
(Note 13)
TYP
(Note 7)
MAX
(Note 13) UNITS NOTES
V
DD SR-
V
DD
Negative Slew Rate 10 V/ms 9
I
2
C Interface Specifications Specifications apply for: V
DD
= 2.7V to 5.5V, T
A
= -40°C to +85°C, unless otherwise stated. Boldface limits
apply over the operating temperature range, -40°C to +85°C.
SYMBOL PARAMETER TEST CONDITIONS
MIN
(Note 13)
TYP
(Note 7)
MAX
(Note 13) UNITS NOTES
V
IL
SDA and SCL Input Buffer LOW
Voltage
-0.3 0.3 x V
DD
V
V
IH
SDA and SCL Input Buffer HIGH
Voltage
0.7 x V
DD
V
DD
+ 0.3 V
Hysteresis SDA and SCL Input Buffer
Hysteresis
0.05 x V
DD
V
V
OL
SDA Output Buffer LOW Voltage,
Sinking 3mA
V
DD
= 5V, I
OL
= 3mA 0.4 V
C
PIN
SDA and SCL Pin Capacitance T
A
= +25°C, f = 1MHz,
V
DD
= 5V, V
IN
=0V,
V
OUT
=0V
10 pF
f
SCL
SCL Frequency 400 kHz
t
IN
Pulse Width Suppression Time at
SDA and SCL Inputs
Any pulse narrower than the
max spec is suppressed.
50 ns
t
AA
SCL Falling Edge to SDA Output
Data Valid
SCL falling edge crossing
30% of V
DD
, until SDA exits
the 30% to 70% of V
DD
window.
900 ns
t
BUF
Time the Bus Must be Free Before
the Start of a New Transmission
SDA crossing 70% of V
DD
during a STOP condition, to
SDA crossing 70% of V
DD
during the following START
condition.
1300 ns
ISL12032
6
FN6618.3
May 5, 2011
t
LOW
Clock LOW Time Measured at the 30% of V
DD
crossing.
1300 ns
t
HIGH
Clock HIGH Time Measured at the 70% of V
DD
crossing.
600 ns
t
SU:STA
START Condition Setup Time SCL rising edge to SDA
falling edge. Both crossing
70% of V
DD
.
600 ns
t
HD:STA
START Condition Hold Time From SDA falling edge
crossing 30% of V
DD
to SCL
falling edge crossing 70% of
V
DD
.
600 ns
t
SU:DAT
Input Data Setup Time From SDA exiting the 30% to
70% of V
DD
window, to SCL
rising edge crossing 30% of
V
DD.
100 ns
t
HD:DAT
Input Data Hold Time From SCL falling edge
crossing 30% of V
DD
to SDA
entering the 30% to 70% of
V
DD
window.
0 900 ns
t
SU:STO
STOP Condition Setup Time From SCL rising edge
crossing 70% of V
DD
, to SDA
rising edge crossing 30% of
V
DD
.
600 ns
t
HD:STO
STOP Condition Hold Time From SDA rising edge to
SCL falling edge. Both
crossing 70% of V
DD
.
600 ns
t
DH
Output Data Hold Time From SCL falling edge
crossing 30% of V
DD
, until
SDA enters the 30% to 70%
of V
DD
window.
0 ns
t
R
SDA and SCL Rise Time From 30% to 70% of V
DD.
20 + 0.1 x Cb 300 ns 10, 12
t
F
SDA and SCL Fall Time From 70% to 30% of V
DD.
20 + 0.1 x Cb 300 ns 10, 12
Cb Capacitive loading of SDA or SCL Total on-chip and off-chip 10 400 pF 10, 12
R
PU
SDA and SCL Bus Pull-up Resistor
Off-chip
Maximum is determined by
t
R
and t
F
.
For Cb = 400pF, max is about
2k.
For Cb = 40pF, max is about
15k
1 k 10, 12
NOTES:
5. IRQ
and F
OUT
Inactive.
6. V
DD
> VBAT +V
BATHYS
7. Specified at T
A
=+25°C.
8. F
SCL
= 400kHz.
9. In order to ensure proper timekeeping, the V
DD SR-
specification must be followed.
10. Parameter is not 100% tested.
11. V
DD
= 0V. I
BAT
increases at V
DD
voltages between 0.5V and 1.5V.
12. These are I
2
C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
13. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
I
2
C Interface Specifications Specifications apply for: V
DD
= 2.7V to 5.5V, T
A
= -40°C to +85°C, unless otherwise stated. Boldface limits
apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL PARAMETER TEST CONDITIONS
MIN
(Note 13)
TYP
(Note 7)
MAX
(Note 13) UNITS NOTES
ISL12032
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

ISL12032IVZ

Mfr. #:
Buy ISL12032IVZ
Manufacturer:
Renesas / Intersil
Description:
Real Time Clock REAL TIME CLK W/ EEPROM 14LD
Lifecycle:
New from this manufacturer.
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