FUNCTIONAL BLOCK DIAGRAM
CLOCK
GENERATION
SERIAL INTERFACE
CONTROL
REGISTER
OUTPUT
REGISTER
CHARGE-BALANCING A/D
CONVERTER
AUTO-ZEROED
-
MODULATOR
DIGITAL
FILTER
AD7711
M
U
X
AGND DGND MODE SDATA SCLK A0
MCLK
OUT
MCLK
IN
AIN1(+)
AIN1(–)
REF
IN (–)
REF
IN (+)
SYNC
4.5A
A = 1–128
DRDYTFSRFS
REF OUT
2.5V REFERENCE
200A
AIN2
V
SS
V
BIAS
AV
DD
DV
DD
PGA
AV
DD
RTD2
200A
RTD1
AV
DD
FEATURES
Charge-Balancing ADC
24 Bits, No Missing Codes
0.0015% Nonlinearity
2-Channel Programmable Gain Front End
Gains from 1 to 128
1 Differential Input
1 Single-Ended Input
Low-Pass Filter with Programmable Filter Cutoffs
Ability to Read/Write Calibration Coefficients
RTD Excitation Current Sources
Bidirectional Microcontroller Serial Interface
Internal/External Reference Option
Single- or Dual-Supply Operation
Low Power (25 mW typ) with Power-Down Mode
(7 mW typ)
APPLICATIONS
RTD Transducers
Process Control
Smart Transmitters
Portable Industrial Instruments
LC
2
MOS Signal Conditioning ADC
with RTD Excitation Currents
GENERAL DESCRIPTION
The AD7711 is a complete analog front end for low frequency
measurement applications. The device accepts low level signals
directly from a transducer and outputs a serial digital word. It
employs a
-
conversion technique to realize up to 24 bits of
no missing codes performance. The input signal is applied to a
proprietary programmable gain front end based around an ana-
log modulator. The modulator output is processed by an on-chip
digital filter. The first notch of this digital filter can be pro-
grammed via the on-chip control register, allowing adjustment
of the filter cutoff and settling time.
The part features one differential analog input and one single-
ended analog input as well as a differential reference input.
Normally, one of the input channels will be used as the main
channel with the second channel used as an auxiliary input to
periodically measure a second voltage. It can be operated from a
single supply (by tying the V
SS
pin to AGND), provided that the
input signals on the analog inputs are more positive than –30 mV.
By taking the V
SS
pin negative, the part can convert signals
down to –V
REF
on its inputs. The part provides two current
sources that can be used to provide excitation in 3-wire and 4-wire
RTD configurations. The AD7711 thus performs all signal
conditioning and conversion for a single- or dual-channel system.
AD7711
The AD7711 is ideal for use in smart, microcontroller based
systems. Gain settings, signal polarity, input channel selection,
and RTD current control can be configured in software using
the bidirectional serial port. The AD7711 contains self-
calibration, system calibration, and background calibration
options, and also allows the user to read and write the on-chip
calibration registers.
CMOS construction ensures low power dissipation, and a software
programmable power-down mode reduces the standby power
consumption to only 7 mW typical. The part is available in a
24-lead, 0.3-inch-wide, plastic and hermetic dual-in-line pack-
age (DIP) as well as a 24-lead small outline (SOIC) package.
PRODUCT HIGHLIGHTS
1. The programmable gain front end allows the AD7711 to
accept input signals directly from an RTD transducer,
removing a considerable amount of signal conditioning.
On-chip current sources provide excitation for 3-wire and
4-wire RTD configurations.
2. No missing codes ensure true, usable, 23-bit dynamic range
coupled with excellent ± 0.0015% accuracy. The effects of
temperature drift are eliminated by on-chip self-calibration,
which removes zero-scale and full-scale errors.
3. The AD7711 is ideal for microcontroller or DSP processor
applications with an on-chip control register that allows
control over filter cutoff, input gain, channel selection, signal
polarity, RTD current control, and calibration modes.
4. The AD7711 allows the user to read and to write the on-chip
calibration registers. This means that the microcontroller has
much greater control over the calibration procedure.
REV. G
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.
AD7711* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DOCUMENTATION
Application Notes
AN-202: An IC Amplifier User’s Guide to Decoupling,
Grounding, and Making Things Go Right for a Change
AN-283: Sigma-Delta ADCs and DACs
AN-311: How to Reliably Protect CMOS Circuits Against
Power Supply Overvoltaging
AN-366: Evaluation Board for the AD7711 24-Bit Sigma-
Delta ADC
AN-388: Using Sigma-Delta Converters-Part 1
AN-389: Using Sigma-Delta Converters-Part 2
AN-397: Electrically Induced Damage to Standard Linear
Integrated Circuits:
AN-406: Using the AD771X Family of 24-Bit Sigma-Delta
A/D Converters
AN-553: Adjusting the Calibration Coefficients on the
AD771X Family of ADCs
AN-607: Selecting a Low Bandwidth (<15 kSPS) Sigma-
Delta ADC
AN-615: Peak-to-Peak Resolution Versus Effective
Resolution
AN-931: Understanding PulSAR ADC Support Circuitry
Data Sheet
AD7711: LC
2
MOS Signal Conditioning ADC with RTD
Excitation Currents Data Sheet
TOOLS AND SIMULATIONS
Sigma-Delta ADC Tutorial
REFERENCE MATERIALS
Technical Articles
Delta-Sigma Rocks RF, As ADC Designers Jump On Jitter
MS-2210: Designing Power Supplies for High Speed ADC
Part 1: Circuit Suggestions Using Features and
Functionality of New Sigma-Delta ADCs
Part 2: Circuit Suggestions Using Features and
Functionality of New Sigma-Delta ADCs
DESIGN RESOURCES
AD7711 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD7711 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
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Parameter A, S Versions
1
Unit Conditions/Comments
STATIC PERFORMANCE
No Missing Codes 24 Bits min Guaranteed by Design. For Filter Notches £ 60 Hz
22 Bits min For Filter Notch = 100 Hz
18 Bits min For Filter Notch = 250 Hz
15 Bits min For Filter Notch = 500 Hz
12 Bits min For Filter Notch = 1 kHz
Output Noise See Tables I and II Depends on Filter Cutoffs and Selected Gain
Integral Nonlinearity @ 25C ± 0.0015 % FSR max Filter Notches £ 60 Hz
T
MIN
to T
MAX
± 0.003 % FSR max Typically ± 0.0003%
Positive Full-Scale Error
2, 3
See Note 4 Excluding Reference
Full-Scale Drift
5
1 mV/C typ Excluding Reference. For Gains of 1, 2
0.3 mV/C typ Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
Unipolar Offset Error
2
See Note 4
Unipolar Offset Drift
5
0.5 mV/C typ For Gains of 1, 2
0.25 mV/C typ For Gains of 4, 8, 16, 32, 64, 128
Bipolar Zero Error
2
See Note 4
Bipolar Zero Drift
5
0.5 mV/C typ For Gains of 1, 2
0.25 mV/C typ For Gains of 4, 8, 16, 32, 64, 128
Gain Drift 2 ppm/C typ
Bipolar Negative Full-Scale Error
2
@ 25C ± 0.003 % FSR max Excluding Reference
T
MIN
to T
MAX
± 0.006 % FSR max Typically ± 0.0006%
Bipolar Negative Full-Scale Drift
5
1 mV/C typ Excluding Reference. For Gains of 1, 2
0.3 mV/C typ Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
ANALOG INPUTS/REFERENCE INPUTS
Normal Mode 50 Hz Rejection
6
100 dB min For Filter Notches of 10 Hz, 25 Hz, 50 Hz, ± 0.02 ¥ f
NOTCH
Normal Mode 60 Hz Rejection
6
100 dB min For Filter Notches of 10 Hz, 30 Hz, 60 Hz, ± 0.02 ¥ f
NOTCH
DC Input Leakage Current
@ 25C
6
10 pA max
T
MIN
to T
MAX
1 nA max
Sampling Capacitance
6
20 pF max
AIN1/REF IN
Common-Mode Rejection (CMR) 100 dB min At DC and AV
DD
= 5 V
Common-Mode Rejection (CMR) 90 dB min At DC and AV
DD
= 10 V
Common-Mode 50 Hz Rejection
6
150 dB min For Filter Notches of 10 Hz, 25 Hz, 50 Hz, ± 0.02 ¥ f
NOTCH
Common-Mode 60 Hz Rejection
6
150 dB min For Filter Notches of 10 Hz, 30 Hz, 60 Hz, ± 0.02 ¥ f
NOTCH
Common-Mode Voltage Range
7
V
SS
to AV
DD
V min to V max
Analog Inputs
8
Input Voltage Range
9
For Normal Operation. Depends on Gain Selected
0 to +V
REF
10
max Unipolar Input Range (B/U Bit of Control Register = 1)
± V
REF
max Bipolar Input Range (B/U Bit of Control Register = 0)
Input Sampling Rate, f
S
See Table III
AIN2 Offset Error 2.5 mV max Removed by System Calibrations but not by Self-Calibration
AIN2 Offset Drift 1.5 mV/C typ
Reference Inputs
REF IN(+) – REF IN(–) Voltage
11
+2.5 to +5 V min to V max For Specified Performance. Part Is Functional with
Lower V
REF
Voltages
Input Sampling Rate, f
S
f
CLK IN
/256
REFERENCE OUTPUT
Output Voltage 2.5 V nom
Initial Tolerance @ 25C ± 1% max
Drift 20 ppm/C typ
Output Noise 30 mV typ Peak-to-Peak Noise. 0.1 Hz to 10 Hz Bandwidth
Line Regulation (AV
DD
)1 mV/V max
Load Regulation 1.5 mV/mA max Maximum Load Current 1 mA
External Current 1 mA max
NOTES
1
Temperature range is as follows: A Version = 40C to +85C; S Version = –55C to +125C. See also Note 16.
2
Applies after calibration at the temperature of interest.
3
Positive full-scale error applies to both unipolar and bipolar input ranges.
4
These errors will be of the order of the output noise of the part, as shown in Table I, after system calibration. These errors will be 20 mV typical after self-calibration
or background calibration.
5
Recalibration at any temperature or use of the background calibration mode will remove these drift errors.
6
These numbers are guaranteed by design and/or characterization.
7
This common-mode voltage range is allowed, provided the input voltage on AIN(+) and AIN(–) does not exceed AV
DD
+ 30 mV and V
SS
– 30 mV.
8
The analog inputs present a very high impedance dynamic load that varies with clock frequency and input sample rate. The maximum recommended source resis-
tance depends on the selected gain (see Tables IV and V).
9
The analog input voltage range on the AIN1(+) input is given here with respect to the voltage on the AIN1(–) input. The input voltage range on the AIN2 input is
with respect to AGND. The absolute voltage on the analog inputs should not go more positive than AV
DD
+ 30 mV, or more negative than V
SS
– 30 mV.
10
V
REF
= REF IN(+) – REF IN(–).
11
The reference input voltage range may be restricted by the input voltage range requirement on the V
BIAS
input.
AD7711–SPECIFICATIONS
–2–
REV. G
(AV
DD
= +5 V
5%; DV
DD
= +5 V 5%; V
SS
= 0 V or –5 V 5%; REF IN(+) =
+2.5 V; REF IN(–) = AGND; MCLK IN = 10 MHz unless otherwise stated. All specifications T
MIN
to T
MAX
, unless otherwise noted.)

AD7711ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC CMOS 24B w/ Matched RTD Excitation Crnt
Lifecycle:
New from this manufacturer.
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