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NCN8024DTBR2G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
NCN8024
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4
PIN FUNCTION AND DESCRIPTION
Pin # DescriptionTypeName
11 CRD_I/O Input/
Output
This pin handles the connection to the serial I/O (C7) of the card connector. A bi−directional level
translator adapts the serial I/O signal between the card and the micro controller. An 11 kW (typical)
pullup resistor to CRD_V
CC
provides a High impedance state for the smart card I/O link.
12 CRD_AUX2 Input/
Output
This pin handles the connection to the chip card’s serial auxiliary AUX2 I/O pin (C8). A bi−directional
level translator adapts the serial I/O signal between the card and the micro controller. An 11 kW
(typical) pullup resistor to CRD_V
CC
provides a High impedance state for the smart card C8 pin.
13 CRD_AUX1 Input/
Output
This pin handles the connection to the chip card’s serial auxiliary AUX1 I/O pin (C4). A bi−directional
level translator adapts the serial I/O signal between the card and the micro controller. An 11 kW
(typical) pullup resistor to CRD_V
CC
provides a High impedance state for the smart card C4 pin.
14 CRD_GND GND Card Ground
15 CRD_CLK Output This pin is connected to the CLOCK card connector’s pin (Chip card’s pin C3). The Clock signal
comes from the CLKIN input through clock dividers and level shifter.
16 CRD_RST Output This pin is connected to the chip card’s RESET pin (C2) through the card connector. A level
translator adapts the external Reset (RSTIN) signal to the smart card.
17 CRD_VCC Power This pin is connected to the smart card power supply pin. An internal DC/DC converter is
programmable using the pin 5V/3V to supply either 5 V or 3 V output voltage. An external distributed
ceramic capacitor (200 nF + 330 nF typical recommended) must be connected across CRD_V
CC
and CRD_GND. This set of capacitor (if distributed) must be low ESR (< 100 mW).
18 PORADJ Input Power−on reset threshold adjustment input pin for changing the reset threshold with an external
resistor power divider. Recommended to be connected to ground when unused.
19 CMDVCC Input Command VCC pin. Activation sequence Enable/Disable pin (active Low). The activation sequence is
enabled by toggling CMDVCC High to Low and when a card is present.
20 RSTIN Input This Reset input connected to the host and referred to V
DD
(microcontroller side), is connected to
the smart card Reset pin through the internal level shifter which translates the level according to the
CRD_V
CC
programmed value.
21 VDD Power This pin is connected to the system controller power supply. It configures the level shifter input
stage to accept the signals coming from the controller. A 0.1 mF capacitor shall be used to bypass
the power supply voltage. When V
DD
is below 2.35 V typical the card pins are disabled.
22 GND GND Ground
23 INT Output The interrupt request is activated LOW on this pin. This is enabled when a card is present and the
card presence is detected by CRD_PRES or CRD_PRES pins. Similarly an interrupt is generated
when CRD_V
CC
is overloaded. 20 kW typical integrated pullup resistor to V
DD
.
24 CLKIN Input Clock Input for External Clock
25 NC Unconnected
26 I/Ouc Input/
Output
This pin is connected to an external micro−controller. A bi−directional level translator adapts the
serial I/O signal between the smart card and the external controller. A built−in constant 11 kW
(typical) resistor provides a high impedance state.
27 AUX1uc Input/
Output
This pin is connected to an external micro−controller. A bi−directional level translator adapts the
serial C4 signal between the smart card and the external controller. A built−in constant 11 kW
(typical) resistor provides a high impedance state.
28 AUX2uc Input/
Output
This pin is connected to an external micro−controller. A bi−directional level translator adapts the
serial C8 signal between the smart card and the external controller. A built−in constant 11 kW
(typical) resistor provides a high impedance state.
NCN8024
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5
ATTRIBUTES
Characteristics Values
ESD protection
Human Body Model (HBM) (Note 1)
Card Pins (Card Interface Pins 9 − 17)
All Other Pins
Machine Model (MM)
Card Pins (Card Interface Pins 9 − 17)
All Other Pins
8 kV
2 kV
400 V
150 V
Moisture sensitivity (Note 2) SOIC−28 and TSSOP−28 Level 3
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch−up Test
1. Human Body Model (HBM), R = 1500 W, C = 100 pF.
2. For additional information, see Application Note AND8003/D.
MAXIMUM RATINGS (Note 3)
Rating Symbol Value Unit
DC/DC Converter Power Supply Voltage V
DDP
−0.3 v V
DDP
v 5.5 V
Power Supply from Microcontroller Side V
DD
−0.3 v V
DD
v 5.5 V
External Card Power Supply CRD_V
CC
−0.3 v CRD_V
CC
v 5.5 V
Charge Pump Output V
UP
−0.3 v V
UP
v 5.5
Digital Input Pins V
in
−0.3 v V
in
v V
DD
V
Digital Output Pins (I/Ouc, AUX1uc, AUX2uc, INT) V
out
−0.3 v V
out
v V
DD
V
Smart Card Output Pins V
out
−0.3 v V
out
v CRD_V
CC
V
Thermal Resistance Junction−to−Air SOIC−28
TSSOP−28
R
q
JA
75
76
°C/W
Operating Ambient Temperature Range T
A
−40 to +85 °C
Operating Junction Temperature Range T
J
−40 to +125 °C
Maximum Junction Temperature T
Jmax
+125 °C
Storage Temperature Range T
stg
−65 to + 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
A
= +25°C
NCN8024
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6
POWER SUPPLY SECTION (V
DD
= 3.3 V; V
DDP
= 5 V; T
amb
= 25°C; F
CLKIN
= 10 MHz)
Pin Symbol Rating Min Typ Max Unit
6 V
DDP
DC/DC Converter Power Supply, CRD_V
CC
= 3 V and 5 V with DC
Load Such as
|I
CC
| v 75 mA
|I
CC
| v 20 mA
3.3
3.0
5.0 5.5
5.5
V
6 V
DDP
NDS Conditions: DC/DC Converter Power Supply, CRD_V
CC
= 3 V
and 5 V with 75 mA Load Transient from 100 Hz to 200 MHz and
/CMDVCC Cycling (Note 4):
|I
CC
| v 75 mA
|I
CC
| v 20 mA
4.5
3.15
5.0 5.5
5.5
V
6 I
DDP
Inactive Mode − − 0.3 mA
6 I
DDP
DC Operating Supply Current, F
CLKIN
= 10 MHz,
Cout
CRD_CLK
= 33 pF, ⎢I
CRD_VCC
⎢ = 0
− − 5.0 mA
6 I
DDP
DC Operating Supply Current,
CRD_V
CC
= 5 V, I
CRD_VCC
= 75 mA
CRD_V
CC
= 3 V, I
CRD_VCC
= 75 mA
− − 200
200
mA
21 V
DD
Operating Voltage 2.7 − 5.5 V
21 I
VDD
Inactive Mode 0 Standby Current − − 0.6 mA
21 I
VDD
Operating Current − F
CLK_IN
= 10 MHz,
Cout
CRD_CLK
= 33 pF, ⎢I
CRD_VCC
⎢ = 0
− − 1 mA
21 UVLOV
DD
Undervoltage Lockout (UVLO), No External Resistor at Pin PORADJ
(Connected to GND), Falling V
DD
Level
2.25 2.35 2.45 V
21 UVLOHys UVLO Hysteresis, No External Resistor at Pin PORADJ
(Connected to GND)
50 130 180 mV
PORADJ PIN
18 V
PORth+
External Rising Threshold Voltage on V
DD
for Power On Reset − Pin
PORADJ
1.18 1.24 1.3 V
18 V
PORth−
External Falling Threshold voltage on V
DD
for Power On Reset − Pin
PORADJ
1.13 1.18 1.24 V
18 V
PORHys
Hysteresis on V
PORth
(pin PORADJ) 30 60 100 mV
18 t
POR
Width of Power−On Reset Pulse (Note 4)
No External Resistor on PORADJ
External Resistor on PORADJ
4
4
8
8
12
12
ms
18 I
IL
Low Level Input Leakage Current, V
IL
<0.5 V (Pulldown Current Source) 5
mA
DC/DC CONVERTER
F
CLK
DC/DC Converter Clock Frequency when Card Active (Note 4) 2.2 3.2 MHz
8 V
UP
Output Voltage on pin V
UP
(average value)
CRD_V
CC
= 5V
CRD_V
CC
= 3V
5.0
5.0
5.23
5.23
5.5
5.5
V
17 C
CRD_VCC
Output Capacitance on card power supply CRD_V
CC
(Notes 4 and 5) 300 220 +
320
1000 nF
17 CRD_V
CC
Output Card Supply Voltage @ 4.5 V< V
DDP
< 5.5 V (including ripple)
CRD_V
CC
= 3.0 V @ I
load
v 65 mA
CRD_V
CC
= 5.0 V @ I
load
v 65 mA
2.85
4.75
3.00
5.00
3.15
5.25
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed
circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the
declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device
specification limit values are applied individually under normal operating conditions and not valid simultaneously.
4. Guaranteed by design and characterization
5. These values take into account the tolerance of the cms capacitor used. The allowed values are single or distributed capacitor combination
not exceeding 1.0 mF with 220 nF + 330 nF typical and recommended. It is recommended to use X5R or X7R−type capacitors with very
low ESR (< 100 mW) for optimal performances.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

NCN8024DTBR2G

Mfr. #:
Buy NCN8024DTBR2G
Manufacturer:
ON Semiconductor
Description:
Interface - Specialized SMART CARD IC 3ST 8INPUT
Lifecycle:
New from this manufacturer.
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