NCN8024
http://onsemi.com
7
POWER SUPPLY SECTION (V
DD
= 3.3 V; V
DDP
= 5 V; T
amb
= 25°C; F
CLKIN
= 10 MHz)
Pin UnitMaxTypMinRatingSymbol
DC/DC CONVERTER
17 CRD_V
CC
Output Card Supply Voltage @ 3.6 V v V
DDP
v 5.5 V with |I
CC
| v
65 mA load transient from 100 Hz to 200 MHz (including ripple)
(Note 4)
CRD_V
CC
= 3.0 V
CRD_V
CC
= 5.0 V
2.76
4.65
3.00
5.00
3.20
5.25
V
V
17 CRD_V
CC
Output Card Supply Voltage @ 4.5 V< V
DDP
< 5.5 V with Current−
Load Pulses of 40 nAs/t < 400 ns and |I
CC
| < 200 mA Peak Current
(Including Ripple) (Note 4)
CRD_V
CC
= 3.0 V
CRD_V
CC
= 5.0 V
2.76
4.65
3.00
5.00
3.20
5.25
V
V
17 I
CRD_VCC
Card Supply Current
@ CRD_V
CC
= 3.0 V
@ CRD_V
CC
= 5.0 V
75
75
mA
17 I
CRD_VCC_SC
Short−Circuit Current − CRD_V
CC
Shorted to Ground 110 150 mA
17
DV
CRD_VCC
Output Card Supply Voltage Ripple Peak−to−Peak − f
ripple
= 100 Hz to
200 MHz (Load Transient with 65 mA Peak Current) (Note 4)
350 mV
17 CRD_V
CCSR
Slew Rate on CRD_V
CC
Up or Down (Note 4) 0.22
V/ms
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed
circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the
declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device
specification limit values are applied individually under normal operating conditions and not valid simultaneously.
4. Guaranteed by design and characterization
5. These values take into account the tolerance of the cms capacitor used. The allowed values are single or distributed capacitor combination
not exceeding 1.0 mF with 220 nF + 330 nF typical and recommended. It is recommended to use X5R or X7R−type capacitors with very
low ESR (< 100 mW) for optimal performances.
DIGITAL INPUT/OUTPUT SECTION CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc, CLKDIV1, CLKDIV2, CMDVCC, 5V/3V
(V
DD
= 3.3 V; V
DDP
= 5 V; T
amb
= 25°C; F
CLKIN
= 10 MHz)
Pin Symbol Rating Min Typ Max Unit
24 F
CLKIN
Clock Frequency on Pin CLKIN (with Divider Ratio w 2) (Note 6) − − 27 MHz
1, 2, 3, 19,
20, 24, 26,
27, 28
V
IL
Input Voltage Level Low: CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc,
CLKDIV1, CLKDIV2, CMDVCC, 5V/3V
−0.3 − 0.3 x V
DD
V
1, 2, 3, 19,
20, 24, 26,
27, 28
V
IH
Input Voltage Level High: CLKIN, RSTIN, I/O, AUX1, AUX2,
CLKDIV1, CLKDIV2, CMDVCC, 5V/3V
0.7 x V
DD
− V
DD
+ 0.3 V
1, 2, 3, 19,
20, 24
I
IL
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, 5V/3V Low Level
Input Leakage Current, V
IL
= 0 V
− − 1.0
mA
1, 2, 3, 19,
20, 24
I
IH
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, 5V/3V Low Level
Input Leakage Current, V
IH
= V
DD
− − 1.0
mA
26, 27, 28 I
IL
I/Ouc, AUX1uc, AUX2uc Low Level Input Leakage Current, V
IL
= 0 V − − 600
mA
26, 27, 28 I
IH
I/Ouc, AUX1uc, AUX2uc High Level Input Leakage Current, V
IH
= V
DD
− − 10
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed
circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the
declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device
specification limit values are applied individually under normal operating conditions and not valid simultaneously.
6. Guaranteed by design and characterization
