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HTSICC4801EW/C7,00

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
HTSICH56_48_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.1 — 11 December 2014
210331 4 of 21
NXP Semiconductors
HTSICH56; HTSICH48
HITAG S transponder IC
6. Block diagram
The HITAG S Transponder requires no external power supply. The contactless interface
generates the power supply and the system clock via the resonant circuitry by inductive
coupling to the Read/Write Device (RWD). The interface also demodulates data
transmitted from the RWD to the HITAG S Transponder, and modulates the magnetic field
for data transmission from the HITAG S Transponder to the RWD.
Data are stored in a non-volatile memory (EEPROM). The EEPROM has a capacity up to
2048 bit and is organized in 64 Pages consisting of 4 Bytes each (1 Page = 32 Bits).
Fig 1. Block diagram
001aak208
CLK
MOD
DEMOD
VREG
VDD
data
in
data
out
clock
R/W
ANALOGUE
RF INTERFACE
PAD
PAD
RECT
Cres
DIGITAL CONTROL
TRANSPONDER
ANTICOLLISION
READ/WRITE
CONTROL
ACCESS CONTROL
EEPROM INTERFACE
CONTROL
RF INTERFACE
CONTROL
EEPROM
SEQUENCER
CHARGE PUMP
256-bit
or
2048-bit
HTSICH56_48_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.1 — 11 December 2014
210331 5 of 21
NXP Semiconductors
HTSICH56; HTSICH48
HITAG S transponder IC
7. Functional description
7.1 Memory organization
The EEPROM has a capacity up to 2048 bit and is organized in 16 Blocks, consisting of
4 Pages each, for commands with Block access. A Page consists of 4 Bytes each (1 Page
= 32 Bits) and is the smallest access unit.
Addressing is done Page by Page (Page 0 to 63) and access is gained either Page by
Page or Block by Block entering the respective Page start address. In case of Block
Read/Write access, the transponder is processed from the start Page address within one
block to the end of the corresponding block.
Two different types of HITAG S IC’s with different memory sizes as shown in the figure
above are available.
Fig 2. Memory organization
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x3B
0x3C
0x3D
0x3E
0x3F
page 0
Page
Address
Block 0
Block 1
Block 2
Block 3
Block 15
32 bit
H56
HITAG S Type
H48
page 1
page 2
page 3
page 4
page 5
page 6
page 7
page 8
page 9
page 10
page 11
page 12
page 13
page 14
page 15
page 16
page 59
page 60
page 61
page 62
page 63
aaa-000830
HTSICH56_48_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.1 — 11 December 2014
210331 6 of 21
NXP Semiconductors
HTSICH56; HTSICH48
HITAG S transponder IC
7.2 HITAG S plain mode
7.3 HITAG S authentication mode
Table 3. Memory map for HITAG S in plain mode
MSByte LSByte
page address MSB LSB MSB LSB MSB LSB MSB LSB
0x00 UID3 UID2 UID1 UID0
0x01 Reserved CON2 CON1 CON0
0x02 Data 3 Data 2 Data 1 Data 0
0x03 Data 3 Data 2 Data 1 Data 0
Table 4. Memory map for HITAG S in authentication mode
MSByte LSByte
page address MSB LSB MSB LSB MSB LSB MSB LSB
0x00 UID3 UID2 UID1 UID0
0x01 PWDH0 CON2 CON1 CON0
0x02 KEYH1 KEYH0 PWDL1 PWDL0
0x03 KEYL3 KEYL2 KEYL1 KEYL0
0x04 Data 3 Data 2 Data 1 Data 0
0x05 Data 3 Data 2 Data 1 Data 0
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

HTSICC4801EW/C7,00

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Buy HTSICC4801EW/C7,00
Manufacturer:
NXP Semiconductors
Description:
RFID Transponders HTSICC4801EW UNCASED/FOIL//C7
Lifecycle:
New from this manufacturer.
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