4
COMMERCIAL TEMPERATURE RANGE
IDT72125 PARALLEL-TO-SERIAL CMOS FIFO
1,024 x 16
AC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 5V ± 10%, TA = 0
ο
C to +70
ο
C)
Commercial
IDT72125L25
Symbol Parameter Figure Min. Max. Unit
tS Parallel Shift Frequency — — 28.5 MHz
tSOCP Serial Shift Frequency — — 50 MHz
PARALLEL INPUT TIMINGS
tWC Write Cycle Time 2 35 — ns
tWPW Write Pulse Width 2 25 — ns
tWR Write Recovery Time 2 10 — ns
tDS Data Set-up Time 2 12 — ns
tDH Data Hold Time 2 0 — ns
tWEF Write High to EF HIGH 5, 6 — 35 ns
tWFF Write Low to FF LOW 4, 7 — 35 ns
tWF Write Low to Transitioning HF, AEF 8— 35ns
tWPF Write Pulse Width After FF HIGH 7 25 — ns
SERIAL OUTPUT TIMINGS
tSOCP Serial Clock Cycle Time 3 20 — ns
tSOCW Serial Clock Width HIGH/LOW 3 8 — ns
tSOPD SOCP Rising Edge to SO Valid Data 3 — 14 ns
tSOHZ SOCP Rising Edge to SO at High-Z
(1)
33 14ns
tSOLZ SOCP Rising Edge to SO at Low-Z
(1)
33 14ns
tSOCEF SOCP Rising Edge to EF LOW 5, 6 — 35 ns
tSOCFF SOCP Rising Edge to FF HIGH 4, 7 — 35 ns
tSOCF SOCP Rising Edge to Transitioning HF, AEF 8— 35ns
tREFSO SOCP Delay After EF HIGH 6 35 — ns
RESET TIMINGS
tRSC Reset Cycle Time 1 35 — ns
tRS Reset Pulse Width 1 25 — ns
tRSS Reset Set-up Time 1 25 — ns
tRSR Reset Recovery Time 1 10 — ns
EXPANSION MODE TIMINGS
tFLS FL Set-up Time to RS Rising Edge 9 7 — ns
tFLH FL Hold Time to RS Rising Edge 9 0 — ns
tDIRS DIR Set-up Time to SOCP Rising Edge 9 10 — ns
tDIRH DIR Hold Time from SOCP Rising Edge 9 5 — ns
tSOXD1 SOCP Rising Edge to RSOX Rising Edge 9 — 15 ns
tSOXD2 SOCP Rising Edge to RSOX Falling Edge 9 — 15 ns
tSIXS RSIX Set-up Time to SOCP Rising Edge 9 5 — ns
tSIXPW RSIX Pulse Width 9 10 — ns
NOTE:
1. Values guaranteed by design.
