SE4110L
GPS Receiver IC
DST-00002 ! Rev 6.4 ! May-26-2009 10 of 22
AC Electrical Characteristics, Receiver
Conditions: V
CC
= V
DD
= 3.3 V, T
A
= 25 $C, f
RF
= 1575.42 MHz unless otherwise stated
Symbol Parameter Note Min. Typ. Max. Unit
NF
Noise Figure,
f
RF
= 1570 MHz To 1580 MHz,
Input to ‘MIX_IN’
- - 10 - dB
S
11
Input 50 " return loss,
f
RF
= 1570 MHz to 1580 MHz
- - 16 - dB
IF Center Frequency, FREF<2:0> = 100
(13 MHz reference)
1 - -4.080 - MHz
IF Center Frequency, FREF<2:0> = 000
(16.368 MHz reference)
1 - +4.092 - MHz
IF Center Frequency, FREF<2:0> = 101
(19.5 MHz reference)
1 - -4.080 - MHz
f
IF
IF Center Frequency, FREF<2:0> = 110
(26 MHz reference)
1 - -4.080 - MHz
M
IX_IR
Mixer Image Rejection 2 20 30 - dB
BW -3dB Bandwidth 3 - 2.2 - MHz
A
RIP
Amplitude ripple , f
C
& 512 kHz
- - 0.5 - dBpp
'T
g
Group Delay Variation, f
C
& 512 kHz
- - 60 - ns
Av
2
Selectivity At f
C
& 2 MHz
- - 8 - dB
Av
4
Selectivity At f
C
& 4 MHz
- - 23 - dB
P
MAX
Maximum signal load at MIX_IN (pin 21)
(for normal AGC operation)
4 - - -137 dBm/Hz
-
1dB GPS Signal Gain Compression
(1575.42 MHz) in presence of CW Blocking
Signal
- - - - -
P
1dBRXBLK
1227.6 MHz (GPS L2)
824 - 849 MHz (GSM850)
880 - 915 MHz (GSM900)
1710 - 1785 MHz (DCS)
1850 - 1910 MHz (PCS)
1920 – 1980 MHz (W-CDMA)
2.4 -2.5 GHz (WLAN/Bluetooth)
5, 6 -
-32.0
-35.0
-35.5
-30.5
-29.5
-28.5
-26.0
- dBm
t
R
Recovery Time From -20 dBm Input
Overload Signal
7 - 3 -
%s
Note: (1) Positive IF frequency denotes no spectral inversion, negative frequency has inverted spectrum
(2) Ratio of level through mixer between wanted input signal at 1575.42MHz and image signal at
1567.236MHz.
(3) Centered at IF CF = 4.092 MHz.
(4) The application should be designed to meet this maximum level across 1575.42 ±5 MHz. An
absence of strong interferers is assumed.
(5) 1575.42MHz signal for blocking measurement is CW at a fixed level of -101dBm.
(6) Levels do not include effects of any external RF filtering.
(7) AGC loop disabled. Receiver is deemed to have recovered when the rms signal level in the ADC
has resettled to its initial value ±1.5 dB.
SE4110L
GPS Receiver IC
DST-00002 ! Rev 6.4 ! May-26-2009 11 of 22
AC Electrical Characteristics, VCO and Local Oscillator
Conditions: V
CC
= V
DD
= 3.3 V, T
A
= 25 $C
Symbol Parameter Note Min. Typ. Max. Unit
LO Centre Frequency
(16.368 MHz reference)
1 - 1571.328 - MHz
f
LO
LO Centre Frequency
(13, 19.5 & 26 MHz reference)
1 - 1579.5 - MHz
L
1k
LO SSB Phase Noise At 1 kHz Offset 2 - -86 - dBc/Hz
L
10k
LO SSB Phase Noise At 10 kHz Offset 2 - -88 - dBc/Hz
L
100k
LO SSB Phase Noise At 100 kHz Offset 2 - -83 - dBc/Hz
Sample clock output frequency
(16.368 MHz reference)
- - 16.368 - MHz
f
CLK
Sample clock output frequency
(13, 19.5 & 26 MHz reference)
- - 19.5 - MHz
Note: (1) VCO frequency operates at 2x LO frequency.
(2) Typical PLL Loop Bandwidth = 200 kHz
AC Electrical Characteristics, Crystal Oscillator
Conditions: V
CC
= V
DD
= 3.3 V, T
A
= 25 $C
Symbol Parameter Note Min. Typ. Max. Unit
f
XTAL
Oscillator Frequency - 13 - 26 MHz
R
X
C
LOAD
P
X
Recommended crystal parameters
ESR
Load capacitance
Drive power specification
1, 2
50
10
80
"
pF
µW
t
START
Oscillator Startup Time To 95 % Of Final
Amplitude And Within 10 ppm Of Final
Frequency
- - 2 - ms
V
IN
External oscillator drive level - 0.2 1 - V p-p
C
IN
External oscillator Input Load Capacitance 3 - 0.5 - pF
Note: (1) Recommended crystal parameters assume a parallel, fundamental mode crystal is used.
(2) Valid for a 13 MHz crystal.
(3) Connected TCXO to XTAL1 (pin 15) input
SE4110L
GPS Receiver IC
DST-00002 ! Rev 6.4 ! May-26-2009 12 of 22
Logic Level Characteristics
Conditions: VCC = VDD = 3.3 V, TA = 25 $C
Symbol Parameter Note Min. Typ. Max. Unit
VIH Logic High Input Voltage 1 0.7VDDN - VDDN V
VIL Logic Low Input Voltage 1 0 - 0.3VDDN V
IIH Input Current Logic High Voltage 1 - 200 - nA
I
IH_RX_EN
Input Current Logic High Voltage for
RX_EN Input (pin 23)
2 - 2.2 - "A
IIL Input Current Logic Low Voltage 1 - -200 - nA
C
ILOAD
Input Load Capacitance 1 - - 2 pF
V
OH
Logic High Output Voltage 3 V
DDN
- 0.1V - VDDN V
V
OL
Logic Low Output Voltage 3 0 - 0.1 V
IOH Output Current Logic High Voltage 3, 4 - 1.45 - mA
IOL Output Current Logic Low Voltage 3, 4 - -1.45 - mA
C
OLOAD
Output Load Capacitance 3 - - 10 pF
Note: (1) Applies to all Logic pins used as inputs: AGC_DIS (pin 6), FREF0 (pin 12), FREF1 (pin 13),
FREF2 (pin 14), OSC_EN (pin 19) and RX_EN (pin 23).
(2) Applies to RX_EN (pin 23) only. Figure dominated by 1.5 M! (nom) on-chip pull-down resistor.
(3) Applies to all Logic pins used as outputs: CLK_OUT (pin 9), SIGN (pin 10), and MAG (pin 11).
(4) Output Current set at Nominal level; no Current Setting Resistor on RVI (pin 20). Positive value
indicates current source; negative value indicates current sink.
Logic Output Current Drive Adjustment Settings
The Logic Outputs on the SE4110L can be adjusted to compensate for parasitics in application board layout. This can
be achieved by adding a resistor between RVI (pin 20) and VDDQ (pin 17) as shown below.
The additional interface capacitance of PCB tracking and connectors between the SE4110L output and baseband IC
input is included in these figures.
These figures are Typical only, and are not guaranteed across temperature and silicon process.
Conditions: VCC = VDD = 3.3 V, TA = 25 $C
Current Setting Resistor Value
(RVI (pin 20) to VDDQ (pin 17))
(!)
Maximum Allowable
Capacitive Loading
(pF)
Current Drive
Level
Not Fitted
5 Nominal
100K 6 X 1.2
39K 7 X 1.4
0R 10 X 2.0

SE4110L-R

Mfr. #:
Manufacturer:
Skyworks Solutions, Inc.
Description:
RF Receiver L-1 Band GPS NF 1.6dB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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