LTC3634
16
3634fc
For more information www.linear.com/LTC3034
APPLICATIONS INFORMATION
Choosing Compensation Components
Loop compensation is a complicated subject and Applica-
tion Note 76 is recommended reading for a full discussion
on maximizing loop bandwidth in a current mode switch-
ing regulator. This section will provide a quick method on
choosing proper components to compensate the LTC3634
regulators.
Figure 4 shows the recommended components to be con-
nected to the ITH pin, and Figure 5 shows an approximate
bode plot of the buck regulator loop using these compo-
nents. It is assumed that the major poles in the system
(the output capacitor pole and the error amplifier output
pole) are located at a frequency lower than the crossover
frequency.
Figure 4. Compensation and Filtering Components
Figure 5. Bode Plot of Regulator Loop
ƒ
P
LOG (ƒ)
ƒ
C
ƒ
Z
3634 F05
–1
0dB
|H(s)|
–2
The first step is to choose the crossover frequency f
C
.
Higher crossover frequencies will result in a faster loop
transient response; however, in order to avoid higher or-
der loop dynamics from the switching power stage, it is
recommended that f
C
not exceed one-tenth the switching
frequency (f
SW
).
Once f
C
is chosen, the value of R
COMP
that sets this cross-
over frequency can be calculated by the following equation:
R
COMP
=
2π f
C
C
OUT
g
m(EA)
g
m(MOD)
V
OUT
V
FBREG
where g
m(EA)
is the error amplifier transconductance
(see the Electrical Characteristics section), and g
m(MOD)
is the modulator transconductance (the transfer function
from ITH voltage to current comparator threshold). For
the LTC3634, this transconductance is nominally 7Ω
–1
.
Once R
COMP
is determined, C
COMP
can be chosen to set
the zero frequency (f
Z
):
f
Z
=
1
2π C
COMP
R
COMP
For 90° of phase margin, f
Z
should be chosen to be less
than one-tenth of f
C
.
Since the ITH node is sensitive to noise coupling, a small
bypass capacitor (C
BYP
) may be used to filter out board
noise. However, this cap contributes a pole at f
P
and may
introduce some phase loss at the crossover frequency:
f
P
=
1
2π C
BYP
R
COMP
For best results, f
P
should be set high enough such that
phase margin is not significantly affected.
If necessary, a capacitor C
F
(as shown in Figure 3) may
be used to add some phase lead.
LTC3634
C
BYP
R
COMP
C
COMP
3634 F04
ITH
SGND
LTC3634
17
3634fc
For more information www.linear.com/LTC3034
Checking Transient Response
The regulator loop response can be checked by observing
the response of the system to a load step. The ITH pin not
only allows optimization of the control loop behavior but
also provides a DC-coupled and AC filtered closed loop
response test point. The DC step, rise time, and settling
behavior at this test point reflect the closed loop response.
Assuming a predominantly second order system, phase
margin and/or damping factor can be estimated using the
percentage of overshoot seen at this pin.
After choosing compensation values as discussed in the
previous section, the design should be tested to verify
stability. The component values may be modified slightly
to optimize transient response once the final PC layout is
done and the particular output capacitor type and value
have been determined. The output capacitors need to be
selected because their various types and values determine
the loop gain and phase. An output current pulse of 20%
to 100% of full load current having a rise time of ~1μs will
produce output voltage and ITH pin waveforms that will
give a sense of the overall loop stability without breaking
the feedback loop.
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, V
OUT
im-
mediately shifts by an amount equal to ΔI
LOAD
ESR, where
ESR is the effective series resistance of C
OUT
. ΔI
LOAD
also
begins to charge or discharge C
OUT
, generating a feedback
error signal used by the regulator to return V
OUT
to its
steady-state value. During this recovery time, V
OUT
can
be monitored for overshoot or ringing that would indicate
a stability problem.
When observing the response of V
OUT
to a load step, the
initial output voltage step may not be within the bandwidth of
the feedback loop, so the standard second order overshoot/
DC ratio cannot be used to determine phase margin. The
output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Application Note 76.
APPLICATIONS INFORMATION
In some applications, a more severe transient can be caused
by switching in loads with large (>10μF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C
OUT
, causing a rapid drop in V
OUT
. No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
INTV
CC
Regulator Bypass Capacitor
An internal low dropout (LDO) regulator produces the 3.3V
supply that powers the internal bias circuitry and drives
the gate of the internal MOSFET switches. The INTV
CC
pin
connects to the output of this regulator and must have a
minimum of 1μF ceramic bypass capacitance to ground.
This capacitor should have low impedance electrical
connections to the INTV
CC
and PGND pins to provide the
transient currents required by the LTC3634. This supply
is intended only to supply additional DC load currents as
desired and not intended to regulate large transient or AC
behavior, as this may impact LTC3634 operation.
Boost Capacitor
The LTC3634 uses a bootstrap circuit to create a voltage
rail above the applied input voltage V
IN
. Specifically, a boost
capacitor, C
BOOST
, is charged to a voltage approximately
equal to INTV
CC
each time the bottom power MOSFET is
turned on. The charge on this capacitor is then used to
supply the required transient current during the remainder
of the switching cycle. When the top MOSFET is turned on,
the BOOST pin voltage will be equal to approximately V
IN
+ 3.3V. For most applications, a 0.1μF ceramic capacitor
closely connected between the BOOST and SW pins will
provide adequate performance.
LTC3634
18
3634fc
For more information www.linear.com/LTC3034
APPLICATIONS INFORMATION
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3634 can turn on the bottom power MOSFET, trip
the current comparator and turn the power MOSFET back
off. This time is typically 40ns. For the controlled on-time
control architecture, the minimum off-time limit imposes
a maximum duty cycle of:
DC
MAX
= 1– f • (t
OFF(MIN)
+ 2 • t
DEAD
)
where f is the switching frequency, t
DEAD
is the nonoverlap
time of the switches, or dead time (typically 15ns), and
t
OFF(MIN)
is the minimum off-time. If the maximum duty
cycle is surpassed, due to a decreasing input voltage
for example, the output will drop out of regulation. The
minimum input voltage to avoid this dropout condition is:
V
IN(MIN)
=
V
OUT
1 f t
OFF(MIN)
+2 t
DEAD
( )
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its ON state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC
MIN
= (f • t
ON(MIN)
)
where t
ON(MIN)
is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
When the regulator output is sinking current, the effective
minimum on-time of the converter will be increased by the
non-overlap time of the power MOSFETs (or the “dead-
time”) during each SW node transition. This “dead-time”
is nominally 15ns, so when sinking current, the minimum
on-time is effectively 15ns + 15ns + 20ns = 50ns.
If the minimum on-time constraint is violated, the converter
will automatically reduce its own switching frequency in
order to maintain output regulation. Once the converter
reduces its switching frequency, the phase information
is lost and the two channels will switch asynchronously.
Furthermore, the regulator may need to be compensated
more conservatively due to the lower switching frequency.
MODE/SYNC Operation
The MODE/SYNC pin is a multipurpose pin allowing both
mode selection and operating frequency synchronization.
Floating this pin or connecting it to INTV
CC
enables Burst
Mode operation on channel 1 for superior efficiency at
light load currents at the expense of slightly higher out-
put voltage ripple. When the MODE/SYNC pin is tied to
ground, forced continuous mode operation is selected,
creating the lowest fixed output ripple at the expense of
light load efficiency.
The LTC3634 will detect the presence of the external
clock signal on the MODE/SYNC pin and synchronize the
internal oscillator to the phase and frequency of the in-
coming clock. The presence of an external clock will place
both regulators into forced continuous mode operation.
Although the R
T
resistor is not strictly necessary when
synchronizing to an external clock, it is recommended to
use a R
T
resistor that matches the nominal external clock
frequency in order to keep the switching regulator biased
correctly whenever the external clock signal is suddenly
removed or reapplied.
Channel 1 Output Voltage Tracking and Soft-Start
The LTC3634 allows the user to control the output voltage
ramp rate of channel 1 by means of the TRACKSS pin.
From 0 to 0.6V, the TRACKSS voltage will override the
internal 0.6V reference input to the error amplifier, thus
regulating the feedback voltage to that of the TRACKSS
pin. When TRACKSS is above 0.6V, tracking is disabled
and the feedback voltage will regulate to the internal
reference voltage.
The voltage at the TRACKSS pin may be driven from an
external source, or alternatively, the user may leverage
the internal 1.4μA pull-up current source to implement
a soft-start function by connecting an external capacitor
(C
SS
) from the TRACKSS pin to ground. The relationship
between output rise time and TRACKSS capacitance is
given by:
t
SS
= 430000Ω • C
SS

LTC3634IFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 15V Dual 3A Monolithic Step Down Regulator for DDR Power
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union