ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
13
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Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
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© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks
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Printed in USA
TM
Revision History
Rev. Issue Date Description Page #
A 2/8/2007 Final Release. -
B 6/4/2007 Fixed various typos. -
C 6/14/2007 Added TSSOP Ordering Information. 12
D 6/20/2007
1. Updated Output Features: Max Frequency Supported.
2. Updated DDRI/DDRII Max Clock Frequency.
1
5, 8
E 8/16/2007
1. Updated Supply Voltage.
2. Updated Input High/Low Current Max. 3
F 9/5/2007 Updated Electrical Specifications. 3-5
G 11/19/2007 Updated Serial Interface Information. 9
H 12/1/2008 Updated Pin Description. 2
