TDA8595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 12 of 51
NXP Semiconductors
TDA8595
I
2
C-bus controlled 4 45 W power amplifier
7.9 Power-on reset and supply voltage spikes
If in I
2
C-bus mode the supply voltage drops below 5 V (see Figure 10) the content of the
I
2
C-bus latches cannot be guaranteed and the power-on reset will be activated. All latches
are reset, the amplifier is switched off and the DIAG pin is pulled LOW to indicate that a
power-on reset has occurred (see bit DB2[D7]). When bit IB1[D0] is set, the power-on flag
is reset, the DIAG pin will be released and the amplifier will start-up.
In legacy mode a supply voltage drop below 5 V will switch off the amplifier and the DIAG
pin will not be pulled LOW.
7.10 Engine start and low voltage operation
The DC output voltage of the amplifier (V
O
) is set to half of the supply voltage and is
related to the voltage on the SVR pin (see Figure 8
; V
O
=V
SVR
1.4 V). A capacitor is
connected on the SVR pin to suppress the ripple on the power supply.
If the supply voltage drops, for instance, during an engine start, the output follows slowly
due to the SVR capacitor. The headroom voltage is the voltage needed for good operation
of the amplifier and is defined as V
hr
= V
P
V
O
(see Figure 8). If the headroom voltage
becomes lower than the headroom protection threshold of 1.6 V, the headroom protection
is activated to prevent pop noise at the output. This protection first activates the hard mute
and then discharges the capacitors on the SVR and ACGND pins to generate more
headroom for the amplifier (see Figure 9
.)
Fig 7. Start-up and shut-down timing in legacy mode
t
amp_on
t
d(mute_off)
fast
mute
soft
mute
V
P
DIAG
001aad171
STB
on
mute
standby
SVR
amplifier
output
t
off
t
d(soft_mute)
t
d(mute_on)
t
d(fast_mute)
