TDA8595J/N2S,112 Datasheet TDA8595TH/N2S,118, TDA8595J/N2S,112, TDA8595TH/N2S,112 | P16-P18

Product data sheet Rev. 5 — 11 June 2013 16 of 51

NXP Semiconductors

TDA8595

C-bus controlled 4  45 W power amplifier

7.13 Diagnostics

Diagnostic information can be read via the I

C-bus, and can also be available on the

DIAG pin or on the STB pin. The DIAG pin has both fixed information (power-on reset

occurred, low battery and high battery) and, via the I

C-bus, selectable information

(temperature, load fault and clip). This information will be seen at the DIAG pin as a logic

OR. In case of a failure, the DIAG pin remains LOW and the microprocessor can read the

failure information via the I

C-bus (the DIAG pin can be used as microprocessor interrupt

to minimize I

C-bus traffic). When the failure is removed, the DIAG pin will be released.

To have full control over the clipping information, the STB pin can be programmed as a

second clip detection pin. The clip detection level can be selected for all channels at once.

It is possible to select whether the clip information is available on the DIAG pin or on the

STB pin, for each channel separately. It is, for instance, possible to distinguish between

clipping of the front and the rear channels.

Diagnostic information selection possibilities are shown in Table 4

Fig 11. Temperature controlled amplifier gain

(°C)

145 175165155

001aad174

(dB)

Table 4. Diagnostic information availability

Diagnostic

information

C-bus mode Legacy mode

DIAG pin STB pin DIAG pin

Power-On Reset

(POR)

after power-on reset,

DIAG pin will remain

LOW until amplifier has

been started

no no

Low battery yes no yes

Clip detection can be enabled per

channel

can be enabled per

channel

yes, fixed level for all

channels on 2 %

Temperature pre-

warning

can be enabled no yes, pre-warning level

is 145 C

Short can be enabled no yes

Product data sheet Rev. 5 — 11 June 2013 17 of 51

NXP Semiconductors

TDA8595

C-bus controlled 4  45 W power amplifier

7.14 Offset detection

The offset detection can be performed with no input signal (for instance when the DSP is

in mute after a start-up) or with an input signal. In I

C-bus mode, if an I

C-bus read of the

output offset is performed, the I

C-bus latches DBx[D2] will be set. When the amplifier

BTL output voltage is within a window with threshold of 1.75 V typical, the latches DBx[D2]

are reset and setting is disabled. If, for instance, after one second an I

C-bus read is

performed again and the offset bits are still set, the output has not crossed the offset

threshold during the last second (see Figure 12

). This can mean the applied frequency is

below 1 Hz (one second I

C-bus read interval) or an output offset of more than 1.75 V is

present.

7.15 DC load detection

When the DC load detection is enabled with bit IB1[D1], an offset is slowly applied at the

output of the amplifiers during the start-up cycle and the load currents are measured.

Different load levels will be detected to differentiate between normal load, line driver load

or open load (see Figure 13

Speaker protection

(missing current)

can be enabled no yes

Offset detection no no no

Load detection no no no

Overvoltage yes no yes

Table 4. Diagnostic information availability …continued

Diagnostic

information

C-bus mode Legacy mode

DIAG pin STB pin DIAG pin

Fig 12. Offset detection

001aad175

reset:

setting

disabled

offset

threshold

= V

OUT+

− V

OUT−

= V

OUT+

− V

OUT−

C-bus mode only

offset

threshold

t = 1 s:

read = no offset

DB1 bit D2 reset

t = 1 s:

read = offset

DB1 bit D2 set

read = set bit

Product data sheet Rev. 5 — 11 June 2013 18 of 51

NXP Semiconductors

TDA8595

C-bus controlled 4  45 W power amplifier

If the amplifier is used as line driver and the external booster has an input impedance of

more than 100  and less than 800  (DC-coupled), the DC load bits will contain

DBx[D5:D4] = 10, independent of the gain setting (see Table 5

By reading the I

C-bus bits the microprocessor can determine, after the start-up of the

amplifier, whether a speaker or an external booster is connected.

Depending on these bits, the amplifier gain can be selected, 26 dB for normal mode or

16 dB for line driver mode. If the gain select is performed when the amplifier is muted, the

gain select will be pop free.

The DC load bits are combined with the AC load bits and are only valid when the AC load

detection is disabled. When the AC load detection is enabled (IB1[D2] = 1), the bits

DBx[D4] will show the content of the AC load detection. When the AC load detection is

disabled again, bit DBx[D4] will show the content of the DC load measurement, which was

stored during the AC load measurement. The AC load detection can only be performed

after the amplifier has completed its start-up cycle and will not conflict with the DC load

detection.

7.16 AC load detection

The AC load detection, enabled with IB1[D2] = 1, is used to detect if AC coupled

speakers, for example tweeters, are connected correctly during assembly. The detection

is audible because a sine wave of a certain frequency (e.g. 19 kHz) needs to be applied to

the inputs of the amplifier. The output voltage over the load impedance will generate an

amplifier current. If the amplifier peak current triggers a 460 mA (peak) threshold detector

three times, the AC load detection bit will be set. A three ‘threshold cross’ counter is used

to prevent false AC load detection when switching the input signal on or off.

An AC coupled speaker will reduce the impedance at the output of the amplifier in a

certain frequency band. The presence of an AC coupled speaker can be determined using

460 mA (peak) and 230 mA (peak) threshold current detection. For instance, at an output

voltage of 2 V (peak) the total impedance must be less than 4  to detect the AC coupled

load, or more than 8  to guarantee only a DC connection is detected.

Fig 13. DC load detection levels

Table 5. DC load detection

DC load bits Meaning (when IB1[D2] = 0)

DBx[D5] DBx[D4]

0 0 normal load

1 0 line driver load

1 1 open load

0 1 not valid

001aad176

20 Ω 800 Ω100 Ω 5 kΩ

LOAD

DETECTION

LEVEL

NORMAL LINE DRIVER MODE OPEN-CIRCUIT

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TDA8595J/N2S,112

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NXP Semiconductors

Description:

Audio Amplifiers I2C-BUS CONTROLLED 4X45 W POWER AMP

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TDA8595J/N2S,112

TDA8595J/N2S,112

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