TDA8595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 19 of 51
NXP Semiconductors
TDA8595
I
2
C-bus controlled 4 45 W power amplifier
The interpretation of line driver and normal mode DC load bit setting for AC load detection
is shown in Table 6
.
When bit IB1[D2] = 1, the AC load detection is enabled. The AC load detection can only
be performed after the amplifier has completed its start-up cycle and will not conflict with
the DC load detection.
7.17 I
2
C-bus diagnostic readout
The diagnostic information of the amplifier can be read via the I
2
C-bus. The I
2
C-bus bits
are set on a failure and will be reset with the I
2
C-bus read command. Even when the
failure is removed, the microprocessor will know what was wrong by reading the I
2
C-bus.
The consequence of this procedure is that old information is read during the I
2
C-bus
readout. Most actual information will be gathered after two successive read commands.
The DIAG pin will give actual diagnostic information (when selected). When a failure is
removed, the DIAG pin will be released instantly, independently of the I
2
C-bus latches.
Table 6. AC load detection
DBx[D4] Meaning (when IB1[D2] = 1)
0 no AC load detected
1 AC load detected
(1) I
oM
< 230 mA (no load detection level)
(2) I
oM
> 460 mA (load detection level)
Fig 14. AC load impedance as a function of peak output voltage
V
oM
(V)
0 54231
001aad177
8
12
4
16
20
|Z
th(load)
|
(Ω)
0
(1)
(2)
