LTC3703-5
19
37035fa
for an extended frequency range. LTC3703-5 circuits
using conventional switching grade electrolytic output
capacitors can often get acceptable phase margin with
Type 2 compensation.
“Type 3” loops (Figure 13) use two poles and two zeros to
obtain a 180° phase boost in the middle of the frequency
band. A properly designed Type 3 circuit can maintain
acceptable loop stability even when low output capacitor
ESR causes the LC section to approach 180° phase shift
well above the initial LC roll-off. As with a Type 2 circuit,
the loop should cross through 0dB in the middle of the
phase bump to maximize phase margin. Many LTC3703-5
circuits using low ESR tantalum or OS-CON output capaci-
tors need Type 3 compensation to obtain acceptable phase
margin with a high bandwidth feedback loop.
feedback amplifier, on the other hand, gives us a handle
with which to adjust the AC response. The goal is to have
180° phase shift at DC (so the loop regulates) and some-
thing less than 360° phase shift at the point that the loop
gain falls to 0dB. The simplest strategy is to set up the
feedback amplifier as an inverting integrator, with the 0dB
frequency lower than the LC pole (Figure 11). This “Type
1” configuration is stable but transient response is less
than exceptional if the LC pole is at a low frequency.
APPLICATIO S I FOR ATIO
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GAIN (dB)
37035 F10
A
V
0
PHASE
6dB/OCT
–12dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
180
270
360
Figure 10. Transfer Function of Buck Modulator
GAIN (dB)
37035 F11
0
PHASE
6dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
180
270
360
R
B
R1
FB
C1
IN
OUT
+
V
REF
Figure 11. Type 1 Schematic and Transfer Function
GAIN (dB)
37035 F12
0
PHASE
6dB/OCT
6dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
–180
–270
–360
R
B
V
REF
R1
R2
FB
C2
IN
OUT
+
C1
Figure 12. Type 2 Schematic and Transfer Function
GAIN (dB)
37035 F13
0
PHASE
6dB/OCT
+6dB/OCT 6dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
180
270
360
R
B
V
REF
R1
R2
FB
C2
IN
OUT
+
C1
C3
R3
Figure 13. Type 3 Schematic and Transfer Function
Figure 12 shows an improved “Type 2” circuit that uses an
additional pole-zero pair to temporarily remove 90° of
phase shift. This allows the loop to remain stable with 90°
more phase shift in the LC section, provided the loop
reaches 0dB gain near the center of the phase “bump.”
Type 2 loops work well in systems where the ESR zero in
the LC roll-off happens close to the LC pole, limiting the
total phase shift due to the LC. The additional phase
compensation in the feedback amplifier allows the 0dB
point to be at or above the LC pole frequency, improving
loop bandwidth substantially over a simple Type 1 loop. It
has limited ability to compensate for LC combinations
where low capacitor ESR keeps the phase shift near 180°
Feedback Component Selection
Selecting the R and C values for a typical Type 2 or Type 3
loop is a nontrivial task. The applications shown in this
data sheet show typical values, optimized for the power
components shown. They should give acceptable perfor-
mance with similar power components, but can be way off
LTC3703-5
20
37035fa
if even one major power component is changed signifi-
cantly. Applications that require optimized transient re-
sponse will require recalculation of the compensation
values specifically for the circuit in question. The underly-
ing mathematics are complex, but the component values
can be calculated in a straightforward manner if we know
the gain and phase of the modulator at the crossover
frequency.
Modulator gain and phase can be measured directly from
a breadboard or can be simulated if the appropriate
parasitic values are known. Measurement will give more
accurate results, but simulation can often get close enough
to give a working system. To measure the modulator gain
and phase directly, wire up a breadboard with an LTC3703-5
and the actual MOSFETs, inductor and input and output
capacitors that the final design will use. This breadboard
should use appropriate construction techniques for high
speed analog circuitry: bypass capacitors located close to
the LTC3703-5, no long wires connecting components,
appropriately sized ground returns, etc. Wire the feedback
amplifier as a simple Type 1 loop, with a 10k resistor from
V
OUT
to FB and a 0.1µF feedback capacitor from COMP to
FB. Choose the bias resistor (R
B
) as required to set the
desired output voltage. Disconnect R
B
from ground and
connect it to a signal generator or to the source output of
a network analyzer (Figure 14) to inject a test signal into
the loop. Measure the gain and phase from the COMP pin
to the output node at the positive terminal of the output
capacitor. Make sure the analyzer’s input is AC coupled so
that the DC voltages present at both the COMP and V
OUT
APPLICATIO S I FOR ATIO
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nodes don’t corrupt the measurements or damage the
analyzer.
If breadboard measurement is not practical, a SPICE
simulation can be used to generate approximate gain/
phase curves. Plug the expected capacitor, inductor and
MOSFET values into the following SPICE deck and gener-
ate an AC plot of V(V
OUT
)/V(COMP) in dB and phase of
V
OUT
in degrees. Refer to your SPICE manual for details of
how to generate this plot.
*3703-5 modulator gain/phase
*2003 Linear Technology
*this file written to run with PSpice 8.0
*may require modifications for other
SPICE simulators
*MOSFETs
rfet mod sw 0.02 ;MOSFET rdson
*inductor
lext sw out1 10u ;inductor value
rl out1 out 0.015 ;inductor series R
*output cap
cout out out2 540u ;capacitor value
resr out2 0 0.01 ;capacitor ESR
*3703-5 internals
emod mod 0 value = {43*v(comp)}
;3703-5multiplier
vstim comp 0 0 ac 1 ;ac stimulus
.ac dec 100 1k 1meg
.probe
.end
With the gain/phase plot in hand, a loop crossover fre-
quency can be chosen. Usually the curves look something
like Figure 10. Choose the crossover frequency in the
rising or flat parts of the phase curve, beyond the external
LC poles. Frequencies between 10kHz and 50kHz usually
work well. Note the gain (GAIN, in dB) and phase (PHASE,
in degrees) at this point. The desired feedback amplifier
gain will be –GAIN to make the loop gain at 0dB at this
frequency. Now calculate the needed phase boost, assum-
ing 60° as a target phase margin:
BOOST = –(PHASE + 30°)
If the required BOOST is less than 60°, a Type 2 loop can
be used successfully, saving two external components.
V
IN
TG
SW
BG
INV
MODE/SYNC
COMP
FB
RUN/SS
LTC3703-5
V
CC
C
IN
5V V
IN
M1
V
OUT
TO
ANALYZER
V
COMP
TO
ANALYZER
AC
SOURCE
FROM
ANALYZER
L
EXT
M2
10µF
DRV
CC
f
SET
0.1µF
R
B
BOOST
GND
BGRTN
+
+
10k
NC
C
OUT
37035 F14
+
Figure 14. Modulator Gain/Phase Measurement Set-Up
LTC3703-5
21
37035fa
BOOST values greater than 60° usually require Type 3
loops for satisfactory performance.
Finally, choose a convenient resistor value for R1 (10k is
usually a good value). Now calculate the remaining values:
(K is a constant used in the calculations)
f = chosen crossover frequency
G = 10
(GAIN/20)
(this converts GAIN in dB to G in
absolute gain)
TYPE 2 Loop:
TYPE 3 Loop:
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Boost Converter Design
The following sections discuss the use of the LTC3703-5
as a step-up (boost) converter. In boost mode, the
LTC3703-5 can step-up output voltages as high as 60V.
These sections discuss only the design steps specific to a
boost converter. For the design steps common to both a
buck and a boost, see the applicable section in the buck
mode section. An example of a boost converter circuit is
shown in the Typical Applications section. To operate the
LTC3703-5 in boost mode, the INV pin should be tied to
the V
CC
voltage (or a voltage above 2V). Note that in boost
mode, pulse-skip operation and the line feedforward com-
pensation are disabled.
For a boost converter, the duty cycle of the main switch is:
D
VV
V
OUT IN
OUT
=
For high V
OUT
to V
IN
ratios, the maximum V
OUT
is limited
by the LTC3703-5’s maximum duty cycle which is typically
93%. The maximum output voltage is therefore:
V
V
D
V
OUT MAX
IN MIN
MAX
IN MIN()
()
()
=
1
14
Boost Converter: Inductor Selection
In a boost converter, the average inductor current equals
the average input current. Thus, the maximum average
inductor current can be calculated from:
I
I
D
I
V
V
LMAX
OMAX
MAX
OMAX
O
IN MIN
()
()
()
()
=
=
1
As with a buck converter, choose the ripple current to be
20% to 40% of I
L(MAX)
. The ripple current amplitude then
determines the inductor value as follows:
L
V
If
D
IN MIN
L
MAX
=
()
The minimum required saturation current for the inductor
is:
I
L(SAT)
> I
L(MAX)
+ I
L
/2
K
BOOST
C
fGKR
CCK
R
K
fC
R
VR
VV
B
REF
OUT REF
=+°
=
=
()
=
=
tan
••
••
()
2
45
2
1
21
12 1
2
21
1
2
π
π
K
BOOST
C
fGR
CCK
R
K
fC
R
R
K
C
fKR
R
VR
VV
B
REF
OUT REF
=+°
=
=
()
=
=
=
=
tan
••
••
()
2
4
45
2
1
21
12 1
2
21
3
1
1
3
1
23
1
π
π
π

LTC3703IG-5#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Lower Voltage Gate-Drive & Supply Version of LTC3703
Lifecycle:
New from this manufacturer.
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