LTC3703-5
22
37035fa
Boost Converter: Power MOSFET Selection
For information about choosing power MOSFETs for a
boost converter, see the Power MOSFET Selection sec-
tion for the buck converter, since MOSFET selection is
similar. However, note that the power dissipation equa-
tions for the MOSFETs at maximum output current in a
boost converter are:
PD
I
D
R
V
I
D
RC
VV V
f
P
D
IR
MAIN MAX
MAX
MAX
DS ON
OUT
MAX
MAX
DR MILLER
CC TH IL TH IL
SYNC
MAX
MAX DS ON
=
+
()
+
()( )
+
()
=
()
+
()
1
1
1
21
11
1
1
1
2
2
2
()
() ()
()
δ
δ
Boost Converter: Output Capacitor Selection
In boost mode, the output capacitor requirements are
more demanding due to the fact that the current waveform
is pulsed instead of continuous as in a buck converter. The
choice of component(s) is driven by the acceptable ripple
voltage which is affected by the ESR, ESL and bulk
capacitance as shown in Figure 15. The total output ripple
voltage is:
=+
VI
fC
ESR
D
OUT O MAX
OUT MAX
()
•–
1
1
where the first term is due to the bulk capacitance and
second term due to the ESR.
The choice of output capacitor is driven also by the RMS
ripple current requirement. The RMS ripple current is:
II
VV
V
RMS COUT O MAX
O IN MIN
IN MIN
()()
()
()
At lower output voltages (less than 30V), it may be
possible to satisfy both the output ripple voltage and RMS
ripple current requirements with one or more capacitors of
APPLICATIO S I FOR ATIO
WUUU
Figure 15. Output Voltage Ripple
Waveform for a Boost Converter
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
V
ESR
V
COUT
V
OUT
(AC)
a single capacitor type. However, at output voltages above
30V where capacitors with both low ESR and high bulk
capacitance are hard to find, the best approach is to use a
combination of aluminum and ceramic capacitors (see
discussion in Input Capacitor section for the buck con-
verter). With this combination, the ripple voltage can be
improved significantly. The low ESR ceremic capacitor
will minimize the ESR step, while the electrolytic will
supply the required bulk capacitance.
Boost Converter: Input Capacitor Selection
The input capacitor of a boost converter is less critical than
the output capacitor, due to the fact that the inductor is in
series with the input and the input current waveform is
continuous. The input voltage source impedance deter-
mines the size of the input capacitor, which is typically in
the range of 10µF to 100µF. A low ESR capacitor is
recommended though not as critical as for the output
capacitor.
The RMS input capacitor ripple current for a boost con-
verter is:
I
V
Lf
D
RMS CIN
IN MIN
MAX()
()
.•
= 03
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to the
input of the converter and solid tantalum capacitors can
fail catastrophically under these conditions. Be sure to
specify surge-tested capacitors!
Boost Converter: Current Limit Programming
The LTC3703-5 provides current limiting in boost mode by
monitoring the V
DS
of the main switch during its on-time
and comparing it to the voltage at I
MAX
. To set the current
limit, calculate the expected voltage drop across the
MOSFET at the maximum desired inductor current and
LTC3703-5
23
37035fa
maximum junction temperature. The maximum inductor
current is a function of both duty cycle and maximum load
current, so the limit must be set for the maximum expected
duty cycle (minimum V
IN
) in order to ensure that the
current limit does not kick in at loads < I
O(MAX)
:
V
I
D
R
V
V
IR
PROG
OMAX
MAX
DS ON
OUT
IN MIN
O MAX DS ON
=+
=
+
()
()
()
() ()
()
•()
1
1
1
δ
δ
Once V
PROG
is determined, R
IMAX
is chosen as follows:
R
IMAX
= V
PROG
/12µA
Note that in a boost mode architecture, it is only possible
to provide protection for “soft” shorts where V
OUT
> V
IN
.
For hard shorts, the inductor current is limited only by the
input supply capability. Refer to Current Limit Program-
ming for buck mode for further considerations for current
limit programming.
Boost Converter: Feedback Loop/Compensation
Compensating a voltage mode boost converter is unfortu-
nately more difficult than for a buck converter. This is due
to an additional right-half plane (RHP) zero that is present
in the boost converter but not in a buck. The additional phase
lag resulting from the RHP zero is difficult if not impossible
to compensate even with a Type 3 loop, so the best approach
is usually to roll off the loop gain at a lower frequency than
what could be achievable in buck converter.
A typical gain/phase plot of a voltage-mode boost con-
verter is shown in Figure 16. The modulator gain and
phase can be measured as described for a buck converter
or can be estimated as follows:
GAIN (COMP-to-V
OUT
DC gain) = 20Log(V
OUT
2
/V
IN
)
Dominant Pole: f
P
=
V
V
LC
IN
OUT
1
2π
Since significant phase shift begins at frequencies above
the dominant LC pole, choose a crossover frequency no
greater than about half this pole frequency. The gain of the
compensation network should equal –GAIN at this fre-
quency so that the overall loop gain is 0dB here. The
compensation component to achieve this, using a Type 1
amplifier (see Figure 11), is:
G = 10
GAIN/20
C1 = 1/(2π • f • G • R1)
Run/Soft-Start Function
The RUN/SS pin is a multipurpose pin that provide a soft-
start function and a means to shut down the LTC3703-5.
Soft-start reduces the input supply’s surge current by
gradually increasing the duty cycle and can also be used
for power supply sequencing.
Pulling RUN/SS below 1V puts the LTC3703-5 into a low
quiescent current shutdown (I
Q
25µA). This pin can be
driven directly from logic as shown in Figure 17. Releasing
APPLICATIO S I FOR ATIO
WUU
U
Figure 16. Transfer Function of Boost Modulator
GAIN
(dB)
PHASE
(DEG)
37035 F16
A
V
00
–90
180
PHASE
GAIN
–12dB/OCT
Figure 17. LTC3703-5 Startup Operation
2ms/DIV
V
OUT
5V/DIV
V
IN
= 50V
I
LOAD
= 2A
C
SS
= 0.01µF
RUN/SS
2V/DIV
I
L
2A/DIV
37035 F17
LTC3703-5
24
37035fa
the main output voltage and the turns ratio of the extra
winding to the primary winding as follows:
V
SEC
(N + 1)V
OUT
Since the secondary winding only draws current when the
synchronous switch is on, load regulation at the auxiliary
output will be relatively good as long as the main output is
running in continuous mode. As the load on the primary
output drops and the LTC3703-5 switches to Pulse Skip
Mode operation, the auxiliary output may not be able to
maintain regulation, especially if the load on the auxiliary
output remains heavy. To avoid this, the auxiliary output
voltage can be divided down with a conventional feedback
resistor string with the divided auxiliary output voltage fed
back to the MODE/SYNC pin. The MODE/SYNC threshold
is trimmed to 800mV with 20mV of hysteresis, allowing
precise control of the auxiliary voltage and is set as
follows:
VV
R
R
SEC MIN()
. +
08 1
1
2
where R1 and R2 are shown in Figure 9c.
If the LTC3703-5 is operating in Pulse Skip Mode and the
auxiliary output voltage drops below V
SEC(MIN)
, the MODE/
SYNC pin will trip and the LTC3703-5 will resume continu-
ous operation regardless of the load on the main output.
Thus, the MODE/SYNC pin removes the requirement that
power must be drawn from the inductor primary in order
to extract power from the auxiliary winding. With the loop
in continuous mode (MODE/SYNC < 0.8V), the auxiliary
outputs may nominally be loaded without regard to the
primary output load.
The following table summarizes the possible states avail-
able on the MODE/SYNC pin:
Table 1.
MODE/SYNC Pin Condition
DC Voltage: 0V to 0.75V Forced Continuous
Current Reversal Enabled
DC Voltage: 0.87V Pulse Skip Mode Operation
No Current Reversal
Feedback Resistors Regulating a Secondary Winding
Ext. Clock: 0V to 2V Forced Continuous
No Current Reversal
the RUN/SS pin allows an internal 4µA current source to
charge up the soft-start capacitor C
SS
. When the voltage
on RUN/SS reaches 1V, the LTC3703-5 begins operating
at its minimum on-time. As the RUN/SS voltage increases
from 1V to 3V, the duty cycle is allowed to increase from
0% to 100%. The duty cycle control minimizes input
supply inrush current and elimates output voltage over-
shoot at start-up and ensures current limit protection even
with a hard short. The RUN/SS voltage is internally clamped
at 4V.
If RUN/SS starts at 0V, the delay before starting is
approximately:
t
V
A
CsFC
DELAY START SS SS,
(. / )=
µ
1
4
025
plus an additional delay, before the output will reach its
regulated value, of:
t
VV
A
CsFC
DELAY REG SS SS,
(. / )
µ
31
4
05
The start delay can be reduced by using diode D1 in
Figure 18.
Figure 18. RUN/SS Pin Interfacing
APPLICATIO S I FOR ATIO
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3.3V
OR 5V
RUN/SS
D1
C
SS
37035 F18
RUN/SS
C
SS
MODE/SYNC Pin (Operating Mode and Secondary
Winding Control)
The MODE/SYNC pin is a dual function pin that can be used
for enabling or disabling Pulse Skip Mode operation and
also as an external clock input for synchronizing the inter-
nal oscillator (see next section). Pulse Skip Mode is enabled
when the MODE/SYNC pin is above 0.8V and is disabled,
i.e. forced continuous, when the pin is below 0.8V.
In addition to providing a logic input to force continuous
operation and external synchronization, the MODE/SYNC
pin provides a means to regulate a flyback winding output
as shown in Figure 9c. The auxiliary output is taken from
a second winding on the core of the inductor, converting
it to a transformer. The auxiliary output voltage is set by

LTC3703IG-5#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Lower Voltage Gate-Drive & Supply Version of LTC3703
Lifecycle:
New from this manufacturer.
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