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ADV202BBCZRL-150

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P41
ADV202 Data Sheet
Rev. D | Page 18 of 40
RAW PIXEL MODE TIMING
Table 12.
Parameter Description Min Typ Max Unit
VDATA
TD
VCLK to PIXELDATA Valid Delay (PIXELDATA Output) 12 ns
VDATA
SU
PIXELDATA Setup to Rising VCLK (PIXELDATA Input) 4 ns
VDATA
HD
PIXELDATA Hold from Rising VCLK (PIXELDATA Input) 4 ns
VRDY
TD
VCLK to VRDY Valid Delay 12 ns
VFRM
SU
VFRM Setup to Rising VCLK (VFRAME Input) 3 ns
VFRM
HD
VFRM Hold from Rising VCLK (VFRAME Input) 4 ns
VFRM
TD
VCLK to VFRM Valid Delay (VFRAME Output) 12 ns
VSTRB
SU
VSTRB Setup to Rising VCLK 4 ns
VSTRB
HD
VSTRB Hold from Rising VCLK 3 ns
N N 0 1 2
04723-031
VCLK
VCLK
PIXEL
DATA(IN)
PIXEL
DATA
VFRM(OUT)
VFRM(IN)
VRDY
VSTRB
N–1 N
0 1 2
VRFM
TD
VDATA
TD
VSTRB
SU
VSTRB
HD
VFRM
SU
VFRM
HD
VD
ATA
HD
VDATA
SU
VRDY
TD
RAW PIXEL MODE – ENCODE
RAW PIXEL MODE – DECODE
Figure 22. Raw Pixel Mode Timing
Data Sheet ADV202
Rev. D | Page 19 of 40
ABSOLUTE MAXIMUM RATINGS
Table 13.
Parameter Rating
VDD (Supply Voltage, Core)
−0.3 V to +1.65 V
IOVDD (Supply Voltage, I/O)
−0.3 V to +IOVDD + 0.3 V
PLLVDD (Supply Voltage, PLL)
−0.3 V to +1.65 V
Storage Temperature (T
S
) Range −65°C to 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 14. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
ADV202 (144-Lead) 22.5° 3.8° C/W
ADV202 (121-Lead) 32.8° 7.92° C/W
ESD CAUTION
ADV202 Data Sheet
Rev. D | Page 20 of 40
PIN BGA ASSIGNMENTS AND FUNCTION DESCRIPTIONS
PIN BGA ASSIGNMENTS
Table 15. Pin BGA Assignments for 121-Lead Package
Pin. No. Pin Location Pin Description
1 A1 DGND
2 A2 HDATA[2]
3 A3 VDD
4 A4 DGND
5 A5 HDATA[0]
6 A6 HDATA[1]
7 A7 VDATA[1]
8 A8 VDD
9 A9 DGND
10 A10 VDATA[0]
11 A11 DGND
12 B1 HDATA[3]
13 B2 HDATA[4]
14 B3 HDATA[5]
15 B4 HDATA[7]
16 B5 HDATA[8]
17 B6 IOVDD
18 B7 VDATA[6]
19 B8 VDATA[5]
20 B9 VDATA[4]
21 B10 VDATA[2]
22 B11 VDATA[3]
23 C1 DGND
24 C2 HDATA[6]
25 C3 HDATA[9]
26 C4 HDATA[10]
27 C5 HDATA[11]
28 C6 IOVDD
29 C7 VDATA[9]
30 C8 IOVDD
31 C9 VDATA[8]
32 C10 VDATA[7]
33 C11 DGND
34 D1 HDATA[12]
35 D2 HDATA[13]
36 D3 HDATA[14]
37 D4 HDATA[15]
38 D5 IOVDD
39 D6 DGND
40 D7 VDD
41 D8 VSYNC
42 D9 HSYNC
43 D10 VDATA[10]
44 D11 VDATA[11]
45 E1 DGND
46 E2 HDATA[18]_VDATA[14]
47 E3 HDATA[17]_VDATA[13]
48 E4 HDATA[16]_VDATA[12]
49 E5 DGND
Pin. No. Pin Location Pin Description
50 E6 DGND
51 E7 DGND
52 E8 IOVDD
53 E9 VCLK
54 E10 FIELD
55 E11 DGND
56 F1 DGND
57 F2 HDATA[19]_VDATA[15]
58 F3 HDATA[20]
59 F4 HDATA[21]
60 F5 DGND
61 F6 DGND
62 F7 DGND
63 F8
DREQ0
64 F9
DACK0
65 F10
DREQ1
66 F11 DGND
67 G1 DGND
68 G2 HDATA[22]
69 G3 HDATA[23]
70 G4 HDATA[24]_JDATA[0]
71 G5 DGND
72 G6 DGND
73 G7 DGND
74 G8 IOVDD
75 G9
DACK1
76 G10
IRQ
77 G11 DGND
78 H1 HDATA[28]_JDATA[4]
79 H2 HDATA[27]_JDATA[3]
80 H3 HDATA[26]_JDATA[2]
81 H4 HDATA[25]_JDATA[1]
82 H5 IOVDD
83 H6 DGND
84 H7 VDD
85 H8
ACK
86 H9
RD
87 H10 ADDR[1]
88 H11 ADDR[3]
89 J1 DGND
90 J2 HDATA[31]_JDATA[7]
91 J3 HDATA[30]_JDATA[6]
92 J4 HDATA[29]_JDATA[5]
93 J5 IOVDD
94 J6 TEST1
95 J7
WE
96 J8
CS
97 J9 ADDR[0]
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P41

ADV202BBCZRL-150

Mfr. #:
Buy ADV202BBCZRL-150
Manufacturer:
Analog Devices Inc.
Description:
Interface - CODECs JPEG 2000 Video IC 150 MHz
Lifecycle:
New from this manufacturer.
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